bool IsEmscripten = TargetTriple.isOSEmscripten();
bool IsAMDGPU = TargetTriple.isAMDGPU();
- // Asan support for AMDGPU assumes X86 as the host right now.
- if (IsAMDGPU)
- IsX86_64 = true;
-
ShadowMapping Mapping;
Mapping.Scale = kDefaultShadowScale;
Mapping.Offset = kAArch64_ShadowOffset64;
else if (IsRISCV64)
Mapping.Offset = kRISCV64_ShadowOffset64;
+ else if (IsAMDGPU)
+ Mapping.Offset = (kSmallX86_64ShadowOffsetBase &
+ (kSmallX86_64ShadowOffsetAlignMask << Mapping.Scale));
else
Mapping.Offset = kDefaultShadowOffset64;
}
;
; CHECK: %[[LOAD_ADDR:[^ ]*]] = ptrtoint i32 addrspace(4)* %a to i64
; CHECK: lshr i64 %[[LOAD_ADDR]], 3
-; CHECK: {{or|add}}
+; CHECK: add i64 %{{.*}}, 2147450880
; CHECK: %[[LOAD_SHADOW_PTR:[^ ]*]] = inttoptr
; CHECK: %[[LOAD_SHADOW:[^ ]*]] = load i8, i8* %[[LOAD_SHADOW_PTR]]
; CHECK: icmp ne i8
;
; CHECK: %[[STORE_ADDR:[^ ]*]] = ptrtoint i32* %q to i64
; CHECK: lshr i64 %[[STORE_ADDR]], 3
-; CHECK: {{or|add}}
+; CHECK: add i64 %{{.*}}, 2147450880
; CHECK: %[[STORE_SHADOW_PTR:[^ ]*]] = inttoptr
; CHECK: %[[STORE_SHADOW:[^ ]*]] = load i8, i8* %[[STORE_SHADOW_PTR]]
; CHECK: icmp ne i8
;
; CHECK: %[[STORE_ADDR:[^ ]*]] = ptrtoint i32* %q to i64
; CHECK: lshr i64 %[[STORE_ADDR]], 3
-; CHECK: {{or|add}}
+; CHECK: add i64 %{{.*}}, 2147450880
; CHECK: %[[STORE_SHADOW_PTR:[^ ]*]] = inttoptr
; CHECK: %[[STORE_SHADOW:[^ ]*]] = load i8, i8* %[[STORE_SHADOW_PTR]]
; CHECK: icmp ne i8
;
; CHECK: %[[STORE_ADDR:[^ ]*]] = ptrtoint i32 addrspace(1)* %p to i64
; CHECK: lshr i64 %[[STORE_ADDR]], 3
-; CHECK: or
+; CHECK: add i64 %{{.*}}, 2147450880
; CHECK: %[[STORE_SHADOW_PTR:[^ ]*]] = inttoptr
; CHECK: %[[STORE_SHADOW:[^ ]*]] = load i8, i8* %[[STORE_SHADOW_PTR]]
; CHECK: icmp ne i8
;
; CHECK: %[[LOAD_ADDR:[^ ]*]] = ptrtoint i32 addrspace(1)* %p to i64
; CHECK: lshr i64 %[[LOAD_ADDR]], 3
-; CHECK: {{add|or}}
+; CHECK: add i64 %{{.*}}, 2147450880
; CHECK: %[[LOAD_SHADOW_PTR:[^ ]*]] = inttoptr
; CHECK: %[[LOAD_SHADOW:[^ ]*]] = load i8, i8* %[[LOAD_SHADOW_PTR]]
; CHECK: icmp ne i8