// CHECK3-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK3: omp.par.outlined.exit.exitStub:
-// CHECK3-NEXT: ret void
// CHECK3: omp.par.region:
// CHECK3-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK3-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
// CHECK3-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK3: .split:
// CHECK3-NEXT: br label [[TMP3]]
+// CHECK3: omp.par.outlined.exit.exitStub:
+// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry.
// CHECK4-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK4: omp.par.outlined.exit.exitStub:
-// CHECK4-NEXT: ret void
// CHECK4: omp.par.region:
// CHECK4-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK4-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
// CHECK4-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK4: .split:
// CHECK4-NEXT: br label [[TMP3]]
+// CHECK4: omp.par.outlined.exit.exitStub:
+// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry.
// CHECK9-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK9-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK9-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK9: omp.par.outlined.exit.exitStub:
-// CHECK9-NEXT: ret void
// CHECK9: omp.par.region:
// CHECK9-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK9-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
// CHECK9-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK9: .split:
// CHECK9-NEXT: br label [[TMP3]]
+// CHECK9: omp.par.outlined.exit.exitStub:
+// CHECK9-NEXT: ret void
//
//
// CHECK9-LABEL: define {{[^@]+}}@.omp_task_entry.
// CHECK10-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK10-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK10-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK10: omp.par.outlined.exit.exitStub:
-// CHECK10-NEXT: ret void
// CHECK10: omp.par.region:
// CHECK10-NEXT: [[TMP1:%.*]] = load float, float* @flag, align 4
// CHECK10-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
// CHECK10-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB]]
// CHECK10: .split:
// CHECK10-NEXT: br label [[TMP3]]
+// CHECK10: omp.par.outlined.exit.exitStub:
+// CHECK10-NEXT: ret void
//
//
// CHECK10-LABEL: define {{[^@]+}}@.omp_task_entry.
// CHECK3-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK3-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK3: omp.par.outlined.exit.exitStub:
-// CHECK3-NEXT: ret void
// CHECK3: omp.par.region:
// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
// CHECK3-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
// CHECK3: omp.par.pre_finalize:
// CHECK3-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+// CHECK3: omp.par.outlined.exit.exitStub:
+// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z3fooIiEvT_
// CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTRELOADED]], align 8
// CHECK3-NEXT: [[VAR:%.*]] = alloca double*, align 8
// CHECK3-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK3: omp.par.outlined.exit.exitStub:
-// CHECK3-NEXT: ret void
// CHECK3: omp.par.region:
// CHECK3-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[ARGC_ADDR]], align 8
// CHECK3-NEXT: call void @_Z3fooIPPcEvT_(i8** [[TMP2]])
// CHECK3-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
// CHECK3: omp.par.pre_finalize:
// CHECK3-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+// CHECK3: omp.par.outlined.exit.exitStub:
+// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z3fooIPPcEvT_
// CHECK4-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK4: omp.par.outlined.exit.exitStub:
-// CHECK4-NEXT: ret void
// CHECK4: omp.par.region:
// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 1, !dbg [[DBG34:![0-9]+]]
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34]]
// CHECK4-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]], !dbg [[DBG34]]
// CHECK4: omp.par.pre_finalize:
// CHECK4-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]], !dbg [[DBG34]]
+// CHECK4: omp.par.outlined.exit.exitStub:
+// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z3fooIiEvT_
// CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTRELOADED]], align 8
// CHECK4-NEXT: [[VAR:%.*]] = alloca double*, align 8
// CHECK4-NEXT: br label [[OMP_PAR_REGION:%.*]]
-// CHECK4: omp.par.outlined.exit.exitStub:
-// CHECK4-NEXT: ret void
// CHECK4: omp.par.region:
// CHECK4-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[ARGC_ADDR]], align 8, !dbg [[DBG57:![0-9]+]]
// CHECK4-NEXT: call void @_Z3fooIPPcEvT_(i8** [[TMP2]]), !dbg [[DBG57]]
// CHECK4-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]], !dbg [[DBG66:![0-9]+]]
// CHECK4: omp.par.pre_finalize:
// CHECK4-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]], !dbg [[DBG66]]
+// CHECK4: omp.par.outlined.exit.exitStub:
+// CHECK4-NEXT: ret void
//
//
// CHECK4-LABEL: define {{[^@]+}}@_Z3fooIPPcEvT_
// CHECK4-NEXT: call void @llvm.dbg.declare(metadata i8*** [[ARGC_ADDR]], metadata [[META70:![0-9]+]], metadata !DIExpression()), !dbg [[DBG71:![0-9]+]]
// CHECK4-NEXT: ret void, !dbg [[DBG71]]
//
-//
\ No newline at end of file
+//
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load float, float* [[F_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..16
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..18
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CANCEL1_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..20
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..22
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1: omp_region.body.split:
; CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK1-NEXT: br label [[OMP_REGION_END]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..25
; CHECK1-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK1: omp.par.outlined.exit.exitStub:
-; CHECK1-NEXT: ret void
; CHECK1: omp.par.region:
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK1: omp.par.merged:
; CHECK1-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK1: omp.par.pre_finalize:
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK1: omp.par.outlined.exit.exitStub:
+; CHECK1-NEXT: ret void
;
;
; CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..37
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load float, float* [[F_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..12
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..16
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..18
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CANCEL1_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..20
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..22
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_RELOADED]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2: omp_region.body.split:
; CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])
; CHECK2-NEXT: br label [[OMP_REGION_END]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..25
; CHECK2-NEXT: store i32 [[TMP0]], i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
-; CHECK2: omp.par.outlined.exit.exitStub:
-; CHECK2-NEXT: ret void
; CHECK2: omp.par.region:
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
; CHECK2: omp.par.merged:
; CHECK2-NEXT: br label [[OMP_PAR_PRE_FINALIZE:%.*]]
; CHECK2: omp.par.pre_finalize:
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT_EXITSTUB:%.*]]
+; CHECK2: omp.par.outlined.exit.exitStub:
+; CHECK2-NEXT: ret void
;
;
; CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..37