drm/i915/icl: Remove DDI IO power domain from PG3 power domains
authorAnshuman Gupta <anshuman.gupta@intel.com>
Sun, 11 Aug 2019 08:19:08 +0000 (13:49 +0530)
committerImre Deak <imre.deak@intel.com>
Mon, 12 Aug 2019 09:03:31 +0000 (12:03 +0300)
The DDI-IO power wells (PWR_WELL_CTL_DDI) are backing
the IO/PHY functionality, which doesn't need the PG3
power power well. Accordingly fixing up the list of
PG3 power domains.

v2: Removed "DDI E/F IO"power domain as well [Imre]

Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190811081908.9114-1-anshuman.gupta@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c

index e3bea2b..99ed4b4 100644 (file)
@@ -2482,15 +2482,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
        BIT_ULL(POWER_DOMAIN_TRANSCODER_C) |            \
        BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) |     \
        BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) |        \
-       BIT_ULL(POWER_DOMAIN_PORT_DDI_B_IO) |           \
        BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) |        \
-       BIT_ULL(POWER_DOMAIN_PORT_DDI_C_IO) |           \
        BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) |        \
-       BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO) |           \
        BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) |        \
-       BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO) |           \
        BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) |        \
-       BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) |           \
        BIT_ULL(POWER_DOMAIN_AUX_B) |                   \
        BIT_ULL(POWER_DOMAIN_AUX_C) |                   \
        BIT_ULL(POWER_DOMAIN_AUX_D) |                   \