imx: imx8mq: add init_nand_clk

Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF,
so we still use legacy mode to configure the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h
index 9fa9eb2..38a6f59 100644 (file)
--- a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h
+++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h
@@ -421,4 +421,6 @@ enum frac_pll_out_val {
        FRAC_PLL_OUT_1000M,
        FRAC_PLL_OUT_1600M,
 };
+
+void init_nand_clk(void);
 #endif

diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
index 0490351..2db5bde 100644 (file)
--- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
@@ -393,6 +393,15 @@ void init_usb_clk(void)
        }
 }
 
+void init_nand_clk(void)
+{
+       clock_enable(CCGR_RAWNAND, 0);
+       clock_set_target_val(NAND_CLK_ROOT,
+                            CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(3) |
+                            CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV4));
+       clock_enable(CCGR_RAWNAND, 1);
+}
+
 void init_uart_clk(u32 index)
 {
        /* Set uart clock root 25M OSC */