radv: determine the last VGT shader at pipeline bind time
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Mon, 27 Mar 2023 12:39:42 +0000 (14:39 +0200)
committerMarge Bot <emma+marge@anholt.net>
Wed, 29 Mar 2023 10:18:24 +0000 (10:18 +0000)
And replace streamout_shader by last_vgt_shader which is similar.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22128>

src/amd/vulkan/radv_cmd_buffer.c
src/amd/vulkan/radv_private.h

index c7b4c72..d2a7b2a 100644 (file)
@@ -6471,6 +6471,9 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline
          radv_bind_shader(cmd_buffer, graphics_pipeline->base.shaders[stage], stage);
       }
 
+      cmd_buffer->state.last_vgt_shader =
+         graphics_pipeline->base.shaders[graphics_pipeline->last_vgt_api_stage];
+
       bool vtx_emit_count_changed =
          !cmd_buffer->state.graphics_pipeline ||
          cmd_buffer->state.graphics_pipeline->vtx_emit_num != graphics_pipeline->vtx_emit_num ||
@@ -10937,13 +10940,12 @@ void
 radv_emit_streamout_enable(struct radv_cmd_buffer *cmd_buffer)
 {
    struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-   struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline;
    bool streamout_enabled = radv_is_streamout_enabled(cmd_buffer);
    struct radeon_cmdbuf *cs = cmd_buffer->cs;
    uint32_t enabled_stream_buffers_mask = 0;
 
-   if (pipeline && pipeline->streamout_shader) {
-      enabled_stream_buffers_mask = pipeline->streamout_shader->info.so.enabled_stream_buffers_mask;
+   if (cmd_buffer->state.last_vgt_shader) {
+      enabled_stream_buffers_mask = cmd_buffer->state.last_vgt_shader->info.so.enabled_stream_buffers_mask;
    }
 
    radeon_set_context_reg_seq(cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
@@ -11025,8 +11027,7 @@ radv_CmdBeginTransformFeedbackEXT(VkCommandBuffer commandBuffer, uint32_t firstC
    RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
    struct radv_streamout_binding *sb = cmd_buffer->streamout_bindings;
    struct radv_streamout_state *so = &cmd_buffer->state.streamout;
-   struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline;
-   struct radv_shader_info *info = &pipeline->streamout_shader->info;
+   struct radv_shader_info *info = &cmd_buffer->state.last_vgt_shader->info;
    unsigned last_target = util_last_bit(so->enabled_mask) - 1;
    struct radeon_cmdbuf *cs = cmd_buffer->cs;
 
index 72e5d87..c5cbab3 100644 (file)
@@ -1585,6 +1585,7 @@ struct radv_cmd_state {
    uint64_t dirty;
 
    VkShaderStageFlags active_stages;
+   struct radv_shader *last_vgt_shader;
 
    uint32_t prefetch_L2_mask;