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drm/i915/gvt: Add one missing MMIO handler for D_SKL_PLUS
author
Colin Xu
<colin.xu@intel.com>
Mon, 1 Jun 2020 03:04:57 +0000
(11:04 +0800)
committer
Zhenyu Wang
<zhenyuw@linux.intel.com>
Wed, 17 Jun 2020 04:35:17 +0000
(12:35 +0800)
_PLANE_CTL_3_A, _PLANE_CTL_3_B and _PLANE_SURF_3_A are handled, but
miss _PLANE_SURF_3_B.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Colin Xu <colin.xu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link:
http://patchwork.freedesktop.org/patch/msgid/20200601030457.14002-1-colin.xu@intel.com
drivers/gpu/drm/i915/gvt/handlers.c
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diff --git
a/drivers/gpu/drm/i915/gvt/handlers.c
b/drivers/gpu/drm/i915/gvt/handlers.c
index
3e88e3b
..
89873a7
100644
(file)
--- a/
drivers/gpu/drm/i915/gvt/handlers.c
+++ b/
drivers/gpu/drm/i915/gvt/handlers.c
@@
-3055,6
+3055,7
@@
static int init_skl_mmio_info(struct intel_gvt *gvt)
MMIO_D(_MMIO(0x72380), D_SKL_PLUS);
MMIO_D(_MMIO(0x7239c), D_SKL_PLUS);
MMIO_D(_MMIO(_PLANE_SURF_3_A), D_SKL_PLUS);
+ MMIO_D(_MMIO(_PLANE_SURF_3_B), D_SKL_PLUS);
MMIO_D(CSR_SSP_BASE, D_SKL_PLUS);
MMIO_D(CSR_HTP_SKL, D_SKL_PLUS);