for (unsigned I = 0; I < Succs.size(); ++I) {
for (const SDep &SI : Succs[I]->Succs) {
const SUnit *SU = SI.getSUnit();
- if (SU != Succs[I] && llvm::find(Succs, SU) == Succs.end())
+ if (SU != Succs[I] && !llvm::is_contained(Succs, SU))
Succs.push_back(SU);
}
}
SmallPtrSet<const SUnit*, 32> Visited;
while (!Preds.empty()) {
const SUnit *SU = Preds.pop_back_val();
- if (llvm::find(Succs, SU) != Succs.end())
+ if (llvm::is_contained(Succs, SU))
return false;
Visited.insert(SU);
for (const SDep &SI : SU->Preds)
const MachineOperand &Op = MI->getOperand(VAddr0Idx + I);
Register Reg = Op.getReg();
LiveInterval *LI = &LIS->getInterval(Reg);
- if (llvm::find(Intervals, LI) != Intervals.end()) {
+ if (llvm::is_contained(Intervals, LI)) {
// Same register used, unable to make sequential
Intervals.clear();
break;
// In this case, we write the "null_export; s_endpgm" skip code in the
// already-existing basic block.
auto NextBBI = std::next(MBB.getIterator());
- bool NoSuccessor = I == MBB.end() &&
- llvm::find(MBB.successors(), &*NextBBI) == MBB.succ_end();
+ bool NoSuccessor =
+ I == MBB.end() && !llvm::is_contained(MBB.successors(), &*NextBBI);
if (NoSuccessor) {
generatePsEndPgm(MBB, I, DL, TII);
ReachableMap[MBB] = true;
if (HaveReachablePred) {
for (MachineBasicBlock *UnreachablePred : Stack) {
- if (llvm::find(Predecessors, UnreachablePred) == Predecessors.end())
+ if (!llvm::is_contained(Predecessors, UnreachablePred))
Predecessors.push_back(UnreachablePred);
}
}
if (DomIt != Visited.end() && DomIt->second <= LoopLevel)
return true;
- if (llvm::find(Blocks, &MBB) != Blocks.end())
+ if (llvm::is_contained(Blocks, &MBB))
return true;
return false;