Fix mips32r6 bug

See also:

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=925129
http://hades.mech.northwestern.edu/images/1/16/MIPS32_Architecture_Volume_II-A_Instruction_Set.pdf
https://lists.gnu.org/archive/html/lightning/2019-08/msg00010.html
https://lists.gnu.org/archive/html/guile-devel/2019-08/msg00030.html

* lightening/mips-cpu.c: Fix encoding of LR.  Thanks to Bruno Haible.

diff --git a/lightening/mips-cpu.c b/lightening/mips-cpu.c
index 7ab58b8738820e523f226c2bc5f4210c8e070ba2..704a2cd4a8421d534b36fdf75956aee5ba821990 100644 (file)
--- a/lightening/mips-cpu.c
+++ b/lightening/mips-cpu.c
@@ -379,7 +379,11 @@ static void _nop(jit_state_t*,int32_t);
 #  define BGTZ(rs,im)                  hrri(MIPS_BGTZ,rs,_ZERO_REGNO,im)
 #  define BNE(rs,rt,im)                        hrri(MIPS_BNE,rs,rt,im)
 #  define JALR(r0)                     hrrrit(MIPS_SPECIAL,r0,0,_RA_REGNO,0,MIPS_JALR)
-#  define JR(r0)                       hrrrit(MIPS_SPECIAL,r0,0,0,0,MIPS_JR)
+#  if 1 /* supports MIPS32 R6 */
+#   define JR(r0)                      hrrrit(MIPS_SPECIAL,r0,0,0,0,MIPS_JALR)
+#  else /* does not support MIPS32 R6 */
+#   define JR(r0)                      hrrrit(MIPS_SPECIAL,r0,0,0,0,MIPS_JR)
+#  endif
 #  define J(i0)                                hi(MIPS_J,i0)
 #  define MOVZ(rd,rs,rt)               hrrrit(0,rs,rt,rd,0,MIPS_MOVZ)
 #  define comr(r0,r1)                  xori(r0,r1,-1)