net/mlx5e: Prevent zero IPsec soft/hard limits

Hardware triggers limit events when the packets arrive and are processed
through the device. In case zero was configured as a limit, the HW won't
be able to arm event as it happens at the end of execution pipeline.

Let's prevent such configuration.

Link: https://lore.kernel.org/r/80d0ba33e21fb28b1b91d306d1da39df3d990b68.1680162300.git.leonro@nvidia.com
Reviewed-by: Raed Salem <raeds@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
index 91fa0a3..c2e4f30 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
@@ -283,6 +283,11 @@ static int mlx5e_xfrm_validate_state(struct mlx5_core_dev *mdev,
                        NL_SET_ERR_MSG_MOD(extack, "Hard packet limit must be greater than soft one");
                        return -EINVAL;
                }
+
+               if (!x->lft.soft_packet_limit || !x->lft.hard_packet_limit) {
+                       NL_SET_ERR_MSG_MOD(extack, "Soft/hard packet limits can't be 0");
+                       return -EINVAL;
+               }
                break;
        default:
                NL_SET_ERR_MSG_MOD(extack, "Unsupported xfrm offload type");