[CACHE_CTRL=$enableval], [CACHE_CTRL=yes])
if test "x$CACHE_CTRL" = xyes; then
- AC_DEFINE(ENABLE_CACHECRTL, 1, [Enable cache control])
+ AC_DEFINE(ENABLE_CACHECTRL, 1, [Enable cache control])
fi
AC_ARG_ENABLE(backendctrl,
TBM_FORMAT_YUV420
};
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
#ifdef TGL_GET_VERSION
static inline int
_tgl_get_version(int fd)
static int
_bo_init_cache_state(tbm_bufmgr_exynos bufmgr_exynos, tbm_bo_exynos bo_exynos, int import)
{
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, 0);
EXYNOS_RETURN_VAL_IF_FAIL(bo_exynos != NULL, 0);
static int
_bo_set_cache_state(tbm_bufmgr_exynos bufmgr_exynos, tbm_bo_exynos bo_exynos, int device, int opt)
{
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, 0);
EXYNOS_RETURN_VAL_IF_FAIL(bo_exynos != NULL, 0);
static int
_bo_save_cache_state(tbm_bufmgr_exynos bufmgr_exynos, tbm_bo_exynos bo_exynos)
{
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, 0);
EXYNOS_RETURN_VAL_IF_FAIL(bo_exynos != NULL, 0);
static void
_bo_destroy_cache_state(tbm_bufmgr_exynos bufmgr_exynos, tbm_bo_exynos bo_exynos)
{
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
EXYNOS_RETURN_IF_FAIL(bufmgr_exynos != NULL);
EXYNOS_RETURN_IF_FAIL(bo_exynos != NULL);
static int
_bufmgr_init_cache_state(tbm_bufmgr_exynos bufmgr_exynos)
{
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, 0);
if (bufmgr_exynos->use_dma_fence)
static void
_bufmgr_deinit_cache_state(tbm_bufmgr_exynos bufmgr_exynos)
{
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
EXYNOS_RETURN_IF_FAIL(bufmgr_exynos != NULL);
if (bufmgr_exynos->use_dma_fence)
if (bo_exynos->map_cnt == 0)
_bo_save_cache_state(bufmgr_exynos, bo_exynos);
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
if (bo_exynos->last_map_device == TBM_DEVICE_CPU)
_exynos_cache_flush(bufmgr_exynos, bo_exynos, TBM_EXYNOS_CACHE_FLUSH_ALL);
#endif
#include <linux/ioctl.h>
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
static char tgl_devfile[] = "/dev/slp_global_lock";
static char tgl_devfile1[] = "/dev/tgl";
#endif
/* get user data with key */
#define TGL_IOCTL_GET_DATA TGL_IOR(_TGL_GET_DATA, struct tgl_usr_data)
-#ifdef ENABLE_CACHECRTL
+#ifdef ENABLE_CACHECTRL
/* indicate cache units. */
enum e_drm_exynos_gem_cache_sel {
EXYNOS_DRM_L1_CACHE = 1 << 0,