MIPS: Fixing floating point register clobbering

Fixing floating point register clobbering for MIPSr6 (32 and 64)
due to using of f31 floating point register as double compare register,
without saving the value of the register before using it.

TEST=cctest/test-debug/*
BUG=

Review URL: https://codereview.chromium.org/1346623002

Cr-Commit-Position: refs/heads/master@{#30765}

diff --git a/src/mips/assembler-mips.h b/src/mips/assembler-mips.h
index 4db04b065fd25a5a8712c05fe38fcc680962e636..c47f6d3abe2760997039c195e584ce6276a9440d 100644 (file)
--- a/src/mips/assembler-mips.h
+++ b/src/mips/assembler-mips.h
@@ -335,7 +335,8 @@ const FPURegister f31 = { 31 };
 #define kLithiumScratchDouble f30
 #define kDoubleRegZero f28
 // Used on mips32r6 for compare operations.
-#define kDoubleCompareReg f31
+// We use the last non-callee saved odd register for O32 ABI
+#define kDoubleCompareReg f19
 
 // FPU (coprocessor 1) control registers.
 // Currently only FCSR (#31) is implemented.

diff --git a/src/mips64/assembler-mips64.h b/src/mips64/assembler-mips64.h
index 01640723333947555e4c040a9459175272e4cb3c..2036aa796397f05009804038c2e504659fa24b8e 100644 (file)
--- a/src/mips64/assembler-mips64.h
+++ b/src/mips64/assembler-mips64.h
@@ -327,7 +327,8 @@ const FPURegister f31 = { 31 };
 #define kLithiumScratchDouble f30
 #define kDoubleRegZero f28
 // Used on mips64r6 for compare operations.
-#define kDoubleCompareReg f31
+// We use the last non-callee saved odd register for N64 ABI
+#define kDoubleCompareReg f23
 
 // FPU (coprocessor 1) control registers.
 // Currently only FCSR (#31) is implemented.