clk: sunxi: Add apb0 gates for A83T
authorVishnu Patekar <vishnupatekar0510@gmail.com>
Sun, 31 Jan 2016 01:20:54 +0000 (09:20 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 2 Feb 2016 13:11:46 +0000 (14:11 +0100)
APB0 is part of PRCM, and is compatible with earlier SOCs.
apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks.
This patch adds support for APB0 gates for A83T.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Documentation/devicetree/bindings/clock/sunxi.txt
drivers/clk/sunxi/clk-simple-gates.c

index e59f57b..7f19ef5 100644 (file)
@@ -39,6 +39,7 @@ Required properties:
        "allwinner,sun6i-a31-apb0-clk" - for the APB0 clock on A31
        "allwinner,sun8i-a23-apb0-clk" - for the APB0 clock on A23
        "allwinner,sun9i-a80-apb0-clk" - for the APB0 bus clock on A80
+       "allwinner,sun8i-a83t-apb0-gates-clk" - for the APB0 gates on A83T
        "allwinner,sun4i-a10-apb0-gates-clk" - for the APB0 gates on A10
        "allwinner,sun5i-a13-apb0-gates-clk" - for the APB0 gates on A13
        "allwinner,sun5i-a10s-apb0-gates-clk" - for the APB0 gates on A10s
index f4da52b..2cfc5a8 100644 (file)
@@ -130,6 +130,8 @@ CLK_OF_DECLARE(sun8i_a23_apb2, "allwinner,sun8i-a23-apb2-gates-clk",
               sunxi_simple_gates_init);
 CLK_OF_DECLARE(sun8i_a33_ahb1, "allwinner,sun8i-a33-ahb1-gates-clk",
               sunxi_simple_gates_init);
+CLK_OF_DECLARE(sun8i_a83t_apb0, "allwinner,sun8i-a83t-apb0-gates-clk",
+              sunxi_simple_gates_init);
 CLK_OF_DECLARE(sun9i_a80_ahb0, "allwinner,sun9i-a80-ahb0-gates-clk",
               sunxi_simple_gates_init);
 CLK_OF_DECLARE(sun9i_a80_ahb1, "allwinner,sun9i-a80-ahb1-gates-clk",