Revert "[RISCV][MC] Add support for experimental zfa extension(FLI instruction not...
authorPhilip Reames <preames@rivosinc.com>
Thu, 16 Feb 2023 15:22:51 +0000 (07:22 -0800)
committerPhilip Reames <listmail@philipreames.com>
Thu, 16 Feb 2023 15:49:44 +0000 (07:49 -0800)
This reverts commit 54c136e6c630966255293d42c882eab116437834. It was submitted without an appropriate patch description.  Will reapply shortly.

llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td [deleted file]
llvm/test/MC/RISCV/rv32zfa-only-valid.s [deleted file]
llvm/test/MC/RISCV/zfa-double-invalid.s [deleted file]
llvm/test/MC/RISCV/zfa-half-invalid.s [deleted file]
llvm/test/MC/RISCV/zfa-invalid.s [deleted file]
llvm/test/MC/RISCV/zfa-valid.s [deleted file]

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
deleted file mode 100644 (file)
index 9113251..0000000
+++ /dev/null
@@ -1,99 +0,0 @@
-//===-- RISCVInstrInfoZfa.td - RISC-V 'Zfa' instructions ---*- tablegen -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes the RISC-V instructions from the standard 'Zfa'
-// additional floating-point extension, version 0.1.
-// This version is still experimental as the 'Zfa' extension hasn't been
-// ratified yet.
-//
-//===----------------------------------------------------------------------===//
-
-//===----------------------------------------------------------------------===//
-// Operand and SDNode transformation definitions.
-//===----------------------------------------------------------------------===//
-
-def RTZArg : AsmOperandClass {
-  let Name = "RTZArg";
-  let RenderMethod = "addFRMArgOperands";
-  let DiagnosticType = "InvalidRTZArg";
-  let ParserMethod = "parseFRMArg";
-}
-
-def rtzarg : Operand<XLenVT> {
-  let ParserMatchClass = RTZArg;
-  let PrintMethod = "printFRMArg";
-  let DecoderMethod = "decodeFRMArg";
-}
-
-//===----------------------------------------------------------------------===//
-// Instruction class templates
-//===----------------------------------------------------------------------===//
-
-let hasSideEffects = 0, mayLoad = 0, mayStore = 0, mayRaiseFPException = 1 in
-class FPBinaryOp_rr<bits<7> funct7, bits<3> funct3, DAGOperand rdty, 
-                    DAGOperand rsty, string opcodestr>
-    : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd), 
-              (ins rsty:$rs1, rsty:$rs2), opcodestr, "$rd, $rs1, $rs2">;
-
-let hasSideEffects = 0, mayLoad = 0, mayStore = 0, mayRaiseFPException = 1,
-    UseNamedOperandTable = 1, hasPostISelHook = 1 in
-class FPUnaryOp_r_rtz<bits<7> funct7, bits<5> rs2val, DAGOperand rdty,
-                      DAGOperand rs1ty, string opcodestr>
-    : RVInstRFrm<funct7, OPC_OP_FP, (outs rdty:$rd),
-                 (ins rs1ty:$rs1, rtzarg:$frm), opcodestr,
-                  "$rd, $rs1$frm"> {
-  let rs2 = rs2val;
-}
-
-//===----------------------------------------------------------------------===//
-// Instructions
-//===----------------------------------------------------------------------===//
-
-let Predicates = [HasStdExtZfa] in {
-def FMINM_S: FPALU_rr<0b0010100, 0b010, "fminm.s", FPR32, /*Commutable*/ 1>;
-def FMAXM_S: FPALU_rr<0b0010100, 0b011, "fmaxm.s", FPR32, /*Commutable*/ 1>;
-
-def FROUND_S : FPUnaryOp_r_frm<0b0100000, 0b00100, FPR32, FPR32, "fround.s">;
-def FROUNDNX_S : FPUnaryOp_r_frm<0b0100000, 0b00101, FPR32, FPR32, "froundnx.s">;
-
-def FLTQ_S : FPCmp_rr<0b1010000, 0b101, "fltq.s", FPR32, /*Commutable*/ 1>;
-def FLEQ_S : FPCmp_rr<0b1010000, 0b100, "fleq.s", FPR32, /*Commutable*/ 1>;
-} // Predicates = [HasStdExtZfa]
-
-let Predicates = [HasStdExtZfa, HasStdExtD] in {
-def FMINM_D: FPALU_rr<0b0010101, 0b010, "fminm.d", FPR64, /*Commutable*/ 1>;
-def FMAXM_D: FPALU_rr<0b0010101, 0b011, "fmaxm.d", FPR64, /*Commutable*/ 1>;
-
-def FROUND_D : FPUnaryOp_r_frm<0b0100001, 0b00100, FPR64, FPR64, "fround.d">;
-def FROUNDNX_D : FPUnaryOp_r_frm<0b0100001, 0b00101, FPR64, FPR64, "froundnx.d">;
-
-def FCVTMOD_W_D
-    : FPUnaryOp_r_rtz<0b1100001, 0b01000, GPR, FPR64, "fcvtmod.w.d">,
-      Sched<[WriteFCvtF64ToI32, ReadFCvtF64ToI32]>;
-
-def FLTQ_D : FPCmp_rr<0b1010001, 0b101, "fltq.d", FPR64, /*Commutable*/ 1>;
-def FLEQ_D : FPCmp_rr<0b1010001, 0b100, "fleq.d", FPR64, /*Commutable*/ 1>;
-} // Predicates = [HasStdExtZfa, HasStdExtD]
-
-let Predicates = [HasStdExtZfa, HasStdExtD, IsRV32] in {
-def FMVH_X_D : FPUnaryOp_r<0b1110001, 0b00001, 0b000, GPR, FPR64, "fmvh.x.d">,
-               Sched<[WriteFMovF32ToI32, ReadFMovF32ToI32]>;
-def FMVP_D_X : FPBinaryOp_rr<0b1011001, 0b000, FPR64, GPR, "fmvp.d.x">,
-               Sched<[WriteFMovI32ToF32, ReadFMovI32ToF32]>;
-} // Predicates = [HasStdExtZfa, HasStdExtD, IsRV32]
-
-let Predicates = [HasStdExtZfa, HasStdExtZfh] in {
-def FMINM_H: FPALU_rr<0b0010110, 0b010, "fminm.h", FPR16, /*Commutable*/ 1>;
-def FMAXM_H: FPALU_rr<0b0010110, 0b011, "fmaxm.h", FPR16, /*Commutable*/ 1>;
-
-def FROUND_H : FPUnaryOp_r_frm<0b0100010, 0b00100, FPR16, FPR16, "fround.h">;
-def FROUNDNX_H : FPUnaryOp_r_frm<0b0100010, 0b00101, FPR16, FPR16, "froundnx.h">;
-
-def FLTQ_H : FPCmp_rr<0b1010010, 0b101, "fltq.h", FPR16, /*Commutable*/ 1>;
-def FLEQ_H : FPCmp_rr<0b1010010, 0b100, "fleq.h", FPR16, /*Commutable*/ 1>;
-} // Predicates = [HasStdExtZfa, HasStdExtZfh]
diff --git a/llvm/test/MC/RISCV/rv32zfa-only-valid.s b/llvm/test/MC/RISCV/rv32zfa-only-valid.s
deleted file mode 100644 (file)
index 2cf5c1c..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zfa,+d,+zfh -riscv-no-aliases -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zfa,+d,+zfh < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zfa,+d,+zfh -M no-aliases -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-#
-# RUN: not llvm-mc -triple riscv32 -mattr=+d,+zfh \
-# RUN:     -riscv-no-aliases -show-encoding < %s 2>&1 \
-# RUN:     | FileCheck -check-prefixes=CHECK-NO-EXT %s
-
-# CHECK-ASM-AND-OBJ: fmvh.x.d a1, fs1
-# CHECK-ASM: encoding: [0xd3,0x85,0x14,0xe2]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fmvh.x.d a1, fs1
-
-# CHECK-ASM-AND-OBJ: fmvp.d.x fs1, a1, a2
-# CHECK-ASM: encoding: [0xd3,0x84,0xc5,0xb2]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fmvp.d.x fs1, a1, a2
diff --git a/llvm/test/MC/RISCV/zfa-double-invalid.s b/llvm/test/MC/RISCV/zfa-double-invalid.s
deleted file mode 100644 (file)
index 3a92b18..0000000
+++ /dev/null
@@ -1,45 +0,0 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zfa,+zfh \
-# RUN:     -riscv-no-aliases -show-encoding < %s 2>&1 \
-# RUN:     | FileCheck -check-prefixes=CHECK-NO-EXTD %s
-# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zfa,+zfh \
-# RUN:     -riscv-no-aliases -show-encoding < %s 2>&1 \
-# RUN:     | FileCheck -check-prefixes=CHECK-NO-EXTD %s
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fminm.d fa0, fa1, fa2
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fmaxm.d fs3, fs4, fs5
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fround.d fs1, fs2
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fround.d fs1, fs2, dyn
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fround.d fs1, fs2, rtz
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fround.d fs1, fs2, rne
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-froundnx.d fs1, fs2
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-froundnx.d fs1, fs2, dyn
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-froundnx.d fs1, fs2, rtz
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-froundnx.d fs1, fs2, rne
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fcvtmod.w.d a1, ft1, rtz
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fltq.d a1, fs1, fs2
-
-# CHECK-NO-EXTD: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}
-fleq.d a1, ft1, ft2
diff --git a/llvm/test/MC/RISCV/zfa-half-invalid.s b/llvm/test/MC/RISCV/zfa-half-invalid.s
deleted file mode 100644 (file)
index f916c9b..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zfa,+d \
-# RUN:     -riscv-no-aliases -show-encoding < %s 2>&1 \
-# RUN:     | FileCheck -check-prefixes=CHECK-NO-EXTZFH %s
-# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zfa,+d \
-# RUN:     -riscv-no-aliases -show-encoding < %s 2>&1 \
-# RUN:     | FileCheck -check-prefixes=CHECK-NO-EXTZFH %s
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fminm.h fa0, fa1, fa2
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fmaxm.h fs3, fs4, fs5
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fround.h fs1, fs2
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fround.h fs1, fs2, dyn
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fround.h fs1, fs2, rtz
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fround.h fs1, fs2, rne
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-froundnx.h fs1, fs2
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-froundnx.h fs1, fs2, dyn
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-froundnx.h fs1, fs2, rtz
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-froundnx.h fs1, fs2, rne
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fltq.h a1, fs1, fs2
-
-# CHECK-NO-EXTZFH: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}}
-fleq.h a1, ft1, ft2
diff --git a/llvm/test/MC/RISCV/zfa-invalid.s b/llvm/test/MC/RISCV/zfa-invalid.s
deleted file mode 100644 (file)
index 067b031..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zfa,+d,+zfh < %s 2>&1 | FileCheck -check-prefixes=CHECK-NO-RV32 %s
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zfa,+d,+zfh < %s 2>&1 | FileCheck -check-prefixes=CHECK-NO-RV64 %s
-
-# Invalid rounding modes
-# CHECK-NO-RV64: error: operand must be 'rtz' floating-point rounding mode
-# CHECK-NO-RV32: error: operand must be 'rtz' floating-point rounding mode
-fcvtmod.w.d a1, ft1, rne
-
-# CHECK-NO-RV64: error: operand must be 'rtz' floating-point rounding mode
-# CHECK-NO-RV32: error: operand must be 'rtz' floating-point rounding mode
-fcvtmod.w.d a1, ft1, dyn
-
-# CHECK-NO-RV64: error: operand must be 'rtz' floating-point rounding mode
-# CHECK-NO-RV32: error: operand must be 'rtz' floating-point rounding mode
-fcvtmod.w.d a1, ft1, rmm
-
-# CHECK-NO-RV64: error: operand must be 'rtz' floating-point rounding mode
-# CHECK-NO-RV32: error: operand must be 'rtz' floating-point rounding mode
-fcvtmod.w.d a1, ft1, rdn
-
-# CHECK-NO-RV64: error: operand must be 'rtz' floating-point rounding mode
-# CHECK-NO-RV32: error: operand must be 'rtz' floating-point rounding mode
-fcvtmod.w.d a1, ft1, rup
diff --git a/llvm/test/MC/RISCV/zfa-valid.s b/llvm/test/MC/RISCV/zfa-valid.s
deleted file mode 100644 (file)
index d67fc81..0000000
+++ /dev/null
@@ -1,202 +0,0 @@
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zfa,+d,+zfh -riscv-no-aliases -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zfa,+d,+zfh -riscv-no-aliases -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zfa,+d,+zfh < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zfa,+d,+zfh -M no-aliases -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zfa,+d,+zfh < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zfa,+d,+zfh -M no-aliases -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-#
-# RUN: not llvm-mc -triple riscv32 -mattr=+d,+zfh \
-# RUN:     -riscv-no-aliases -show-encoding < %s 2>&1 \
-# RUN:     | FileCheck -check-prefixes=CHECK-NO-EXT %s
-# RUN: not llvm-mc -triple riscv64 -mattr=+d,+zfh \
-# RUN:     -riscv-no-aliases -show-encoding < %s 2>&1 \
-# RUN:     | FileCheck -check-prefixes=CHECK-NO-EXT %s
-
-# CHECK-ASM-AND-OBJ: fminm.s fa0, fa1, fa2
-# CHECK-ASM: encoding: [0x53,0xa5,0xc5,0x28]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fminm.s fa0, fa1, fa2
-
-# CHECK-ASM-AND-OBJ: fmaxm.s fs3, fs4, fs5
-# CHECK-ASM: encoding: [0xd3,0x39,0x5a,0x29]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fmaxm.s fs3, fs4, fs5
-
-# CHECK-ASM-AND-OBJ: fminm.d fa0, fa1, fa2
-# CHECK-ASM: encoding: [0x53,0xa5,0xc5,0x2a]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fminm.d fa0, fa1, fa2
-
-# CHECK-ASM-AND-OBJ: fmaxm.d fs3, fs4, fs5
-# CHECK-ASM: encoding: [0xd3,0x39,0x5a,0x2b]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fmaxm.d fs3, fs4, fs5
-
-# CHECK-ASM-AND-OBJ: fminm.h fa0, fa1, fa2
-# CHECK-ASM: encoding: [0x53,0xa5,0xc5,0x2c]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fminm.h fa0, fa1, fa2
-
-# CHECK-ASM-AND-OBJ: fmaxm.h fs3, fs4, fs5
-# CHECK-ASM: encoding: [0xd3,0x39,0x5a,0x2d]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fmaxm.h fs3, fs4, fs5
-
-# CHECK-ASM-AND-OBJ: fround.s fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x49,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.s fs1, fs2
-
-# CHECK-ASM-AND-OBJ: fround.s fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x49,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.s fs1, fs2, dyn
-
-# CHECK-ASM-AND-OBJ: fround.s fs1, fs2, rtz
-# CHECK-ASM: encoding: [0xd3,0x14,0x49,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.s fs1, fs2, rtz
-
-# CHECK-ASM-AND-OBJ: fround.s fs1, fs2, rne
-# CHECK-ASM: encoding: [0xd3,0x04,0x49,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.s fs1, fs2, rne
-
-# CHECK-ASM-AND-OBJ: froundnx.s fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x59,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.s fs1, fs2
-
-# CHECK-ASM-AND-OBJ: froundnx.s fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x59,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.s fs1, fs2, dyn
-
-# CHECK-ASM-AND-OBJ: froundnx.s fs1, fs2, rtz
-# CHECK-ASM: encoding: [0xd3,0x14,0x59,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.s fs1, fs2, rtz
-
-# CHECK-ASM-AND-OBJ: froundnx.s fs1, fs2, rne
-# CHECK-ASM: encoding: [0xd3,0x04,0x59,0x40]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.s fs1, fs2, rne
-
-# CHECK-ASM-AND-OBJ: fround.d fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x49,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.d fs1, fs2
-
-# CHECK-ASM-AND-OBJ: fround.d fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x49,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.d fs1, fs2, dyn
-
-# CHECK-ASM-AND-OBJ: fround.d fs1, fs2, rtz
-# CHECK-ASM: encoding: [0xd3,0x14,0x49,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.d fs1, fs2, rtz
-
-# CHECK-ASM-AND-OBJ: fround.d fs1, fs2, rne
-# CHECK-ASM: encoding: [0xd3,0x04,0x49,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.d fs1, fs2, rne
-
-# CHECK-ASM-AND-OBJ: froundnx.d fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x59,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.d fs1, fs2
-
-# CHECK-ASM-AND-OBJ: froundnx.d fs1, fs2, dyn
-# CHECK-ASM: encoding: [0xd3,0x74,0x59,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.d fs1, fs2, dyn
-
-# CHECK-ASM-AND-OBJ: froundnx.d fs1, fs2, rtz
-# CHECK-ASM: encoding: [0xd3,0x14,0x59,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.d fs1, fs2, rtz
-
-# CHECK-ASM-AND-OBJ: froundnx.d fs1, fs2, rne
-# CHECK-ASM: encoding: [0xd3,0x04,0x59,0x42]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.d fs1, fs2, rne
-
-# CHECK-ASM-AND-OBJ: fround.h ft1, fa1, dyn
-# CHECK-ASM: encoding: [0xd3,0xf0,0x45,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.h ft1, fa1
-
-# CHECK-ASM-AND-OBJ: fround.h ft1, fa1, dyn
-# CHECK-ASM: encoding: [0xd3,0xf0,0x45,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.h ft1, fa1, dyn
-
-# CHECK-ASM-AND-OBJ: fround.h ft1, fa1, rtz
-# CHECK-ASM: encoding: [0xd3,0x90,0x45,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.h ft1, fa1, rtz
-
-# CHECK-ASM-AND-OBJ: fround.h fs1, fs2, rne
-# CHECK-ASM: encoding: [0xd3,0x04,0x49,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fround.h fs1, fs2, rne
-
-# CHECK-ASM-AND-OBJ: froundnx.h ft1, fa1, dyn
-# CHECK-ASM: encoding: [0xd3,0xf0,0x55,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.h ft1, fa1
-
-# CHECK-ASM-AND-OBJ: froundnx.h ft1, fa1, dyn
-# CHECK-ASM: encoding: [0xd3,0xf0,0x55,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.h ft1, fa1, dyn
-
-# CHECK-ASM-AND-OBJ: froundnx.h ft1, fa1, rtz
-# CHECK-ASM: encoding: [0xd3,0x90,0x55,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.h ft1, fa1, rtz
-
-# CHECK-ASM-AND-OBJ: froundnx.h fs1, fs2, rne
-# CHECK-ASM: encoding: [0xd3,0x04,0x59,0x44]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-froundnx.h fs1, fs2, rne
-
-# CHECK-ASM-AND-OBJ: fcvtmod.w.d a1, ft1, rtz
-# CHECK-ASM: encoding: [0xd3,0x95,0x80,0xc2]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fcvtmod.w.d a1, ft1, rtz
-
-# CHECK-ASM-AND-OBJ: fltq.s a1, fs1, fs2
-# CHECK-ASM: encoding: [0xd3,0xd5,0x24,0xa1]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fltq.s a1, fs1, fs2
-
-# CHECK-ASM-AND-OBJ: fleq.s a1, ft1, ft1
-# CHECK-ASM: encoding: [0xd3,0xc5,0x10,0xa0]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fleq.s a1, ft1, ft1
-
-# CHECK-ASM-AND-OBJ: fltq.d a1, fs1, fs2
-# CHECK-ASM: encoding: [0xd3,0xd5,0x24,0xa3]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fltq.d a1, fs1, fs2
-
-# CHECK-ASM-AND-OBJ: fleq.d a1, ft1, ft2
-# CHECK-ASM: encoding: [0xd3,0xc5,0x20,0xa2]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fleq.d a1, ft1, ft2
-
-# CHECK-ASM-AND-OBJ: fltq.h a1, fs1, fs2
-# CHECK-ASM: encoding: [0xd3,0xd5,0x24,0xa5]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fltq.h a1, fs1, fs2
-
-# CHECK-ASM-AND-OBJ: fleq.h a1, ft1, ft2
-# CHECK-ASM: encoding: [0xd3,0xc5,0x20,0xa4]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zfa' (Additional Floating-Point){{$}}
-fleq.h a1, ft1, ft2