drm/i915/display/psr: Disable DC3CO when the PSR2 is used
authorGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Thu, 1 Apr 2021 17:02:37 +0000 (20:02 +0300)
committerJosé Roberto de Souza <jose.souza@intel.com>
Fri, 2 Apr 2021 17:24:43 +0000 (10:24 -0700)
Due to the changed sequence of activating/deactivating DC3CO, disable
DC3CO until the changed dc3co activating/deactivating sequence is applied.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/3134
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210401170237.40472-1-gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_psr.c

index 1d56181..32d3d56 100644 (file)
@@ -655,6 +655,13 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp,
        u32 exit_scanlines;
 
        /*
+        * FIXME: Due to the changed sequence of activating/deactivating DC3CO,
+        * disable DC3CO until the changed dc3co activating/deactivating sequence
+        * is applied. B.Specs:49196
+        */
+       return;
+
+       /*
         * DMC's DC3CO exit mechanism has an issue with Selective Fecth
         * TODO: when the issue is addressed, this restriction should be removed.
         */