ARM: dts: arm: Update ICST clock nodes 'reg' and node names
authorRob Herring <robh@kernel.org>
Sun, 24 Oct 2021 23:22:39 +0000 (01:22 +0200)
committerArnd Bergmann <arnd@arndb.de>
Tue, 26 Oct 2021 15:20:51 +0000 (17:20 +0200)
Add a 'reg' entry for ICST clock nodes on the Arm Ltd platforms. The 'reg'
entry is the VCO register address. With this, the node name can be updated
to use a generic node name, 'clock-controller', and a unit-address.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20211024232239.211822-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/arm-realview-eb.dtsi
arch/arm/boot/dts/arm-realview-pb1176.dts
arch/arm/boot/dts/arm-realview-pb11mp.dts
arch/arm/boot/dts/arm-realview-pbx.dtsi
arch/arm/boot/dts/integratorap-im-pd1.dts
arch/arm/boot/dts/integratorap.dts
arch/arm/boot/dts/integratorcp.dts

index 56441ef..2dfb32b 100644 (file)
                                label = "versatile:7";
                                default-state = "off";
                        };
-                       oscclk0: osc0@0c {
+                       oscclk0: clock-controller@c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x0c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x0C>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk1: osc1@10 {
+                       oscclk1: clock-controller@10 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x10 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x10>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk2: osc2@14 {
+                       oscclk2: clock-controller@14 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x14 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x14>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk3: osc3@18 {
+                       oscclk3: clock-controller@18 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x18 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x18>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk4: osc4@1c {
+                       oscclk4: clock-controller@1c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x1c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x1c>;
index df71ee2..06b8723 100644 (file)
                                label = "versatile:7";
                                default-state = "off";
                        };
-                       oscclk0: osc0@0c {
+                       oscclk0: clock-controller@c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x0c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x0C>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk1: osc1@10 {
+                       oscclk1: clock-controller@10 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x10 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x10>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk2: osc2@14 {
+                       oscclk2: clock-controller@14 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x14 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x14>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk3: osc3@18 {
+                       oscclk3: clock-controller@18 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x18 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x18>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk4: osc4@1c {
+                       oscclk4: clock-controller@1c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x1c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x1c>;
index 54d4cbd..295aef4 100644 (file)
                                default-state = "off";
                        };
 
-                       oscclk0: osc0@0c {
+                       oscclk0: clock-controller@c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x0c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x0C>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk1: osc1@10 {
+                       oscclk1: clock-controller@10 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x10 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x10>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk2: osc2@14 {
+                       oscclk2: clock-controller@14 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x14 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x14>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk3: osc3@18 {
+                       oscclk3: clock-controller@18 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x18 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x18>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk4: osc4@1c {
+                       oscclk4: clock-controller@1c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x1c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x1c>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk5: osc5@d4 {
+                       oscclk5: clock-controller@d4 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0xd4 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0xd4>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk6: osc6@d8 {
+                       oscclk6: clock-controller@d8 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0xd8 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0xd8>;
index 9366fec..6f61f96 100644 (file)
                                label = "versatile:7";
                                default-state = "off";
                        };
-                       oscclk0: osc0@0c {
+                       oscclk0: clock-controller@c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x0c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x0C>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk1: osc1@10 {
+                       oscclk1: clock-controller@10 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x10 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x10>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk2: osc2@14 {
+                       oscclk2: clock-controller@14 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x14 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x14>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk3: osc3@18 {
+                       oscclk3: clock-controller@18 {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x18 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x18>;
                                clocks = <&xtal24mhz>;
                        };
-                       oscclk4: osc4@1c {
+                       oscclk4: clock-controller@1c {
                                compatible = "arm,syscon-icst307";
+                               reg = <0x1c 0x04>;
                                #clock-cells = <0>;
                                lock-offset = <0x20>;
                                vco-offset = <0x1c>;
index 0614f82..d47bfb6 100644 (file)
        syscon@0 {
                compatible = "arm,im-pd1-syscon", "syscon";
                reg = <0x00000000 0x1000>;
+               ranges;
+               #address-cells = <1>;
+               #size-cells = <1>;
 
-               vco1: vco1-clock {
+               vco1: clock-controller@0 {
                        compatible = "arm,impd1-vco1";
+                       reg = <0x00 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x08>;
                        vco-offset = <0x00>;
@@ -38,8 +42,9 @@
                        clock-output-names = "IM-PD1-VCO1";
                };
 
-               vco2: vco2-clock {
+               vco2: clock-controller@4 {
                        compatible = "arm,impd1-vco2";
+                       reg = <0x04 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x08>;
                        vco-offset = <0x04>;
index 67d1f9b..9b652cc 100644 (file)
@@ -88,8 +88,9 @@
                };
 
                /* Oscillator on the core module, clocks the CPU core */
-               cmosc: cmosc@24M {
+               cmosc: clock-controller@8 {
                        compatible = "arm,syscon-icst525-integratorap-cm";
+                       reg = <0x08 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x14>;
                        vco-offset = <0x08>;
@@ -97,8 +98,9 @@
                };
 
                /* Auxilary oscillator on the core module, 32.369MHz at boot */
-               auxosc: auxosc@24M {
+               auxosc: clock-controller@1c {
                        compatible = "arm,syscon-icst525";
+                       reg = <0x1c 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x14>;
                        vco-offset = <0x1c>;
        syscon {
                compatible = "arm,integrator-ap-syscon", "syscon";
                reg = <0x11000000 0x100>;
+               ranges = <0x0 0x11000000 0x100>;
+               #size-cells = <1>;
+               #address-cells = <1>;
 
                /*
                 * SYSCLK clocks PCIv3 bridge, system controller and the
                 * logic modules.
                 */
-               sysclk: apsys@24M {
+               sysclk: clock-controller@4 {
                        compatible = "arm,syscon-icst525-integratorap-sys";
+                       reg = <0x04 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x1c>;
                        vco-offset = <0x04>;
                };
 
                /* One-bit control for the PCI bus clock (33 or 25 MHz) */
-               pciclk: pciclk@24M {
+               pciclk: clock-controller@4,8 {
                        compatible = "arm,syscon-icst525-integratorap-pci";
+                       reg = <0x04 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x1c>;
                        vco-offset = <0x04>;
index 01fa229..38fc7e8 100644 (file)
@@ -92,8 +92,9 @@
                };
 
                /* Oscillator on the core module, clocks the CPU core */
-               cmcore: cmosc@24M {
+               cmcore: clock-controller@8 {
                        compatible = "arm,syscon-icst525-integratorcp-cm-core";
+                       reg = <0x08 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x14>;
                        vco-offset = <0x08>;
                };
 
                /* Oscillator on the core module, clocks the memory bus */
-               cmmem: cmosc@24M {
+               cmmem: clock-controller@8,12 {
                        compatible = "arm,syscon-icst525-integratorcp-cm-mem";
+                       reg = <0x08 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x14>;
                        vco-offset = <0x08>;
                };
 
                /* Auxilary oscillator on the core module, clocks the CLCD */
-               auxosc: auxosc@24M {
+               auxosc: clock-controller@1c {
                        compatible = "arm,syscon-icst525";
+                       reg = <0x1c 0x04>;
                        #clock-cells = <0>;
                        lock-offset = <0x14>;
                        vco-offset = <0x1c>;