ARM: dts: Assign correct UART gate clock to Exynos4x12 FIMC-IS

Use gate from CLK_GAT_IP_ISP register rather than MUX clock output gate
from CLK_SRC_MASK_ISP.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 894a987..0eafcce 100644 (file)
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -274,7 +274,7 @@
                                <&clock 356>, <&clock 342>, <&clock 17>,
                                <&clock 357>, <&clock 358>, <&clock 359>,
                                <&clock 360>, <&clock 450>,<&clock 451>,
-                               <&clock 452>, <&clock 453>, <&clock 176>,
+                               <&clock 452>, <&clock 453>, <&clock 382>,
                                <&clock 13>, <&clock 454>, <&clock 395>,
                                <&clock 455>;
                        clock-names = "lite0", "lite1", "ppmuispx",