drm/amdgpu/gmc11: enable AGP aperture
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 26 May 2022 16:48:51 +0000 (12:48 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 3 Jun 2022 20:45:00 +0000 (16:45 -0400)
Enable the AGP aperture on chips with GMC v11.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

index 5eccaa2c7ca0ebcdf45f22686a90463c31f91efa..f99d7641bb2177b169a617bdf7756360c5c45c48 100644 (file)
@@ -154,10 +154,11 @@ static void gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
 {
        uint64_t value;
 
-       /* Disable AGP. */
+       /* Program the AGP BAR */
        WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, 0x00FFFFFF);
+       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
+       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
+
 
        /* Program the system aperture low logical page number. */
        WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,
index 9c225553f5b531023a4bfe7320e32fe19e445896..454a25cc00461a20af401a0a55dfe178f9a4aea7 100644 (file)
@@ -611,6 +611,7 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
 
        amdgpu_gmc_vram_location(adev, &adev->gmc, base);
        amdgpu_gmc_gart_location(adev, mc);
+       amdgpu_gmc_agp_location(adev, mc);
 
        /* base offset of vram pages */
        adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev);
index bc11b2de37aebb7cbeddf76e4a1a5d2cc826dbff..4926fa82c1c4dcd2f780c0b3e71e5ee0859878bf 100644 (file)
@@ -169,10 +169,10 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
        uint64_t value;
        uint32_t tmp;
 
-       /* Disable AGP. */
+       /* Program the AGP BAR */
        WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
 
        if (!amdgpu_sriov_vf(adev)) {
                /*
index 770be0a8f7ce7a4d1d8d2a687aa96cf310cb822b..5e5b884d83573a5ca91f144a9569257d3c75d6e9 100644 (file)
@@ -162,10 +162,10 @@ static void mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
        uint64_t value;
        uint32_t tmp;
 
-       /* Disable AGP. */
+       /* Program the AGP BAR */
        WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
 
        if (!amdgpu_sriov_vf(adev)) {
                /*