#define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3)
#define EXYNOS_DRM_PLANE_CAP_PIX_BLEND (1 << 4)
#define EXYNOS_DRM_PLANE_CAP_WIN_BLEND (1 << 5)
+#define EXYNOS_DRM_PLANE_CAP_GSCALER (1 << 6)
struct exynos_drm_plane;
struct exynos_drm_plane_ops {
return 0;
}
+static bool is_in_range(int val, int min, int max)
+{
+ return (val >= min) && (val < max);
+}
+
static int
exynos_drm_plane_check_size(struct exynos_drm_plane_state *state)
{
bool width_ok = false, height_ok = false;
if (plane->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
- return 0;
+ width_ok = height_ok = true;
if (state->src.w == state->crtc.w)
width_ok = true;
state->v_ratio == (1 << 15))
height_ok = true;
+ if (plane->capabilities & EXYNOS_DRM_PLANE_CAP_GSCALER) {
+ width_ok = is_in_range(state->src.w, 64, 4800) &&
+ is_in_range(state->crtc.w, 64, 4800);
+ height_ok = is_in_range(state->src.h, 64, 3344) &&
+ is_in_range(state->crtc.h, 64, 3344);
+ }
+
if (width_ok && height_ok)
return 0;