soc: samsung: Add ASV support for Exynos5433 SoC

This patch adds Adaptive Supply Voltage support or the Cortex A53
and the Cortex A57 clusters. There is no Adaptive Body Bias handling
added yet.

Change-Id: I07190bf3614428292594b42bb8a1fb60a7b3ae63
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
index d6118f5..0b50e0e 100644 (file)
--- a/drivers/soc/samsung/Makefile
+++ b/drivers/soc/samsung/Makefile
@@ -1,7 +1,8 @@
 obj-$(CONFIG_EXYNOS_CHIPID)    += exynos-chipid.o
 obj-$(CONFIG_EXYNOS_PMU)       += exynos-pmu.o exynos-sysram.o
 
-obj-$(CONFIG_EXYNOS_ASV)       += exynos-asv.o exynos5422-asv.o
+obj-$(CONFIG_EXYNOS_ASV)       += exynos-asv.o exynos5422-asv.o \
+                                       exynos5433-asv.o
 
 obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS)   += exynos3250-pmu.o exynos4-pmu.o \
                                        exynos5250-pmu.o exynos5420-pmu.o

diff --git a/drivers/soc/samsung/exynos-asv.c b/drivers/soc/samsung/exynos-asv.c
index 71fa32f..99098b8 100644 (file)
--- a/drivers/soc/samsung/exynos-asv.c
+++ b/drivers/soc/samsung/exynos-asv.c
@@ -20,6 +20,7 @@
 
 #include "exynos-asv.h"
 #include "exynos5422-asv.h"
+#include "exynos5433-asv.h"
 
 #ifndef MHZ
 #define MHZ 1000000U
@@ -128,6 +129,8 @@ static int __init exynos_asv_init(void)
        if (of_machine_is_compatible("samsung,exynos5800") ||
            of_machine_is_compatible("samsung,exynos5420"))
                ret = exynos5422_asv_init(exynos_asv);
+       else if (of_machine_is_compatible("samsung,exynos5433"))
+               ret = exynos5433_asv_init(exynos_asv);
        else
                return 0;
 

diff --git a/drivers/soc/samsung/exynos5433-asv.c b/drivers/soc/samsung/exynos5433-asv.c
new file mode 100644 (file)
index 0000000..c730e0f
--- /dev/null
+++ b/drivers/soc/samsung/exynos5433-asv.c
@@ -0,0 +1,457 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd.
+ *           http://www.samsung.com/
+ *
+ * Samsung Exynos 5433 SoC Adaptive Supply Voltage support
+ */
+
+#include <linux/bitrev.h>
+#include <linux/cpu.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip.h>
+#include <linux/mtd/mtd.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_fdt.h>
+#include <linux/platform_device.h>
+#include <linux/pm_opp.h>
+
+#include "exynos-asv.h"
+#include "exynos5433-asv.h"
+#include "exynos-chipid.h"
+
+static struct mtd_info *otp;
+
+static const u32 volt_table_egl_v0[SYSC_DVFS_END_LVL_EGL+1][MAX_ASV_GROUP+1] = {
+       /*       ASV0     ASV1     ASV2     ASV3     ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2500, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {2400, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500},
+       {2300, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500},
+       {2200, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500},
+       {2100, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500},
+       {2000, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500},
+       {1900, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500},
+       {1800, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500},
+       {1700, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000},
+       {1600, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500},
+       {1500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500},
+       {1400, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500},
+       {1300, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  925000,  912500,  912500},
+       {1200, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  937500,  925000,  925000,  925000,  912500,  912500},
+       {1100, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  950000,  937500,  925000,  925000,  925000,  925000,  925000,  912500,  912500},
+       {1000,  987500,  975000,  962500,  950000,  937500,  937500,  925000,  925000,  912500,  912500,  912500,  912500,  912500,  912500,  900000,  900000},
+       { 900,  950000,  937500,  925000,  925000,  925000,  925000,  912500,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 800,  925000,  912500,  912500,  912500,  912500,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 700,  925000,  912500,  912500,  912500,  912500,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 600,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 400,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 300,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 200,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+};
+
+static const u32 volt_table_kfc_v0[SYSC_DVFS_END_LVL_KFC+1][MAX_ASV_GROUP+1] = {
+       /*       ASV0     ASV1     ASV2     ASV3     ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000},
+       {1900, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000},
+       {1800, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000},
+       {1700, 1350000, 1350000, 1325000, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000},
+       {1600, 1312500, 1300000, 1275000, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000},
+       {1500, 1262500, 1250000, 1225000, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000},
+       {1400, 1212500, 1200000, 1175000, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000},
+       {1300, 1162500, 1150000, 1125000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000},
+       {1200, 1125000, 1112500, 1087500, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500},
+       {1100, 1087500, 1075000, 1050000, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  875000},
+       {1000, 1062500, 1050000, 1025000, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  850000},
+       { 900, 1037500, 1025000, 1000000,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  825000},
+       { 800, 1012500, 1000000,  975000,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  825000,  812500,  800000},
+       { 700,  987500,  975000,  950000,  925000,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  825000,  812500,  800000,  800000,  800000},
+       { 600,  962500,  950000,  925000,  900000,  887500,  875000,  862500,  850000,  837500,  825000,  812500,  800000,  800000,  800000,  800000,  800000},
+       { 500,  937500,  925000,  900000,  875000,  862500,  850000,  837500,  825000,  812500,  800000,  800000,  800000,  800000,  800000,  800000,  800000},
+       { 400,  912500,  900000,  875000,  850000,  837500,  825000,  812500,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000},
+       { 300,  887500,  875000,  850000,  825000,  812500,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000},
+       { 200,  862500,  850000,  825000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000,  800000},
+};
+
+static const u32 volt_table_egl_v1[SYSC_DVFS_END_LVL_EGL+1][MAX_ASV_GROUP+1] = {
+             /* ASV0     ASV1     ASV2    ASV3      ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2500, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {2400, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {2300, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500},
+       {2200, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1337500, 1337500, 1325000, 1312500, 1300000, 1287500},
+       {2100, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1287500, 1287500, 1275000, 1262500, 1250000, 1237500},
+       {2000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1237500, 1237500, 1225000, 1212500, 1200000, 1187500},
+       {1900, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1187500, 1187500, 1175000, 1162500, 1150000, 1137500},
+       {1800, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1150000, 1150000, 1137500, 1125000, 1112500, 1100000},
+       {1700, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1112500, 1112500, 1100000, 1087500, 1075000, 1062500},
+       {1600, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1075000, 1075000, 1062500, 1050000, 1037500, 1025000},
+       {1500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1037500, 1037500, 1025000, 1012500, 1000000,  987500},
+       {1400, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1012500, 1012500, 1000000,  987500,  975000,  962500},
+       {1300, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  987500,  987500,  975000,  962500,  950000,  937500},
+       {1200, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  962500,  962500,  950000,  937500,  925000,  912500},
+       {1100, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  937500,  937500,  925000,  912500,  900000,  900000},
+       {1000, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  912500,  912500,  900000,  900000,  900000,  900000},
+       { 900, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 800,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 700,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 600,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 400,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 300,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 200,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+};
+
+static const u32 volt_table_kfc_v1[SYSC_DVFS_END_LVL_KFC+1][MAX_ASV_GROUP+1] = {
+             /* ASV0     ASV1     ASV2    ASV3      ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1900, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1800, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1700, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000},
+       {1600, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1300000, 1300000, 1287500, 1275000, 1262500, 1250000},
+       {1500, 1362500, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1250000, 1250000, 1237500, 1225000, 1212500, 1200000},
+       {1400, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1175000, 1175000, 1162500, 1150000, 1137500, 1125000},
+       {1300, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1112500, 1112500, 1100000, 1087500, 1075000, 1062500},
+       {1200, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1062500, 1062500, 1050000, 1037500, 1025000, 1012500},
+       {1100, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1025000, 1025000, 1012500, 1000000,  987500,  975000},
+       {1000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  987500,  987500,  975000,  962500,  950000,  937500},
+       { 900, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  950000,  950000,  937500,  925000,  912500,  900000},
+       { 800, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  925000,  925000,  912500,  900000,  887500,  875000},
+       { 700, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  887500,  887500,  875000,  862500,  850000,  837500},
+       { 600,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  862500,  862500,  850000,  837500,  825000,  812500},
+       { 500,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  837500,  837500,  825000,  812500,  800000,  787500},
+       { 400,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  825000,  812500,  800000,  800000,  800000,  787500,  775000,  762500,  750000},
+       { 300,  875000,  862500,  850000,  837500,  825000,  812500,  800000,  787500,  775000,  762500,  762500,  762500,  750000,  737500,  725000,  712500},
+       { 200,  837500,  825000,  812500,  800000,  787500,  775000,  762500,  750000,  737500,  725000,  725000,  725000,  712500,  700000,  700000,  700000},
+};
+
+static const u32 volt_table_egl_v2[SYSC_DVFS_END_LVL_EGL+1][MAX_ASV_GROUP+1] = {
+             /* ASV0     ASV1     ASV2    ASV3      ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2500, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {2400, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {2300, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500},
+       {2200, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500},
+       {2100, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500},
+       {2000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500},
+       {1900, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500},
+       {1800, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000},
+       {1700, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500},
+       {1600, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000},
+       {1500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500},
+       {1400, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500},
+       {1300, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500},
+       {1200, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000},
+       {1100, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000},
+       {1000, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 900, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 800,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 700,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 600,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 400,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 300,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 200,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+};
+
+static const u32 volt_table_kfc_v2[SYSC_DVFS_END_LVL_KFC+1][MAX_ASV_GROUP+1]  = {
+             /* ASV0     ASV1     ASV2    ASV3      ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1900, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1800, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1700, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000},
+       {1600, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1300000, 1300000, 1287500, 1275000, 1262500, 1250000},
+       {1500, 1362500, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1250000, 1250000, 1237500, 1225000, 1212500, 1200000},
+       {1400, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1175000, 1175000, 1162500, 1150000, 1137500, 1125000},
+       {1300, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1112500, 1112500, 1100000, 1087500, 1075000, 1062500},
+       {1200, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1062500, 1062500, 1050000, 1037500, 1025000, 1012500},
+       {1100, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1025000, 1025000, 1012500, 1000000,  987500,  975000},
+       {1000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  987500,  987500,  975000,  962500,  950000,  937500},
+       { 900, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  950000,  950000,  937500,  925000,  912500,  900000},
+       { 800, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  925000,  925000,  912500,  900000,  887500,  875000},
+       { 700, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  887500,  887500,  875000,  862500,  850000,  837500},
+       { 600,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  862500,  862500,  850000,  837500,  825000,  812500},
+       { 500,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  837500,  837500,  825000,  812500,  800000,  787500},
+       { 400,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  825000,  812500,  800000,  800000,  800000,  787500,  775000,  762500,  750000},
+       { 300,  887500,  862500,  850000,  837500,  825000,  812500,  800000,  787500,  775000,  762500,  762500,  762500,  750000,  737500,  725000,  725000},
+       { 200,  887500,  862500,  837500,  812500,  800000,  787500,  775000,  762500,  750000,  737500,  725000,  725000,  725000,  725000,  725000,  725000},
+};
+
+/* V111 */
+static const u32 volt_table_egl_v3[SYSC_DVFS_END_LVL_EGL+1][MAX_ASV_GROUP+1] = {
+             /* ASV0     ASV1     ASV2    ASV3      ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2500, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {2400, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {2300, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000},
+       {2200, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000},
+       {2100, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000},
+       {2000, 1362500, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000},
+       {1900, 1300000, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000},
+       {1800, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500},
+       {1700, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000},
+       {1600, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000},
+       {1500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500},
+       {1400, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500},
+       {1300, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500},
+       {1200, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000},
+       {1100, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000},
+       {1000, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 900, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 800,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 700,  950000,  937500,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 600,  925000,  912500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 500,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 400,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 300,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+       { 200,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000,  900000},
+};
+
+static const u32 volt_table_kfc_v3[SYSC_DVFS_END_LVL_KFC+1][MAX_ASV_GROUP+1]  = {
+             /* ASV0     ASV1     ASV2    ASV3      ASV4     ASV5     ASV6     ASV7     ASV8     ASV9    ASV10    ASV11    ASV12    ASV13    ASV14    ASV15 */
+       {2000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1900, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1800, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000},
+       {1700, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000},
+       {1600, 1350000, 1350000, 1350000, 1350000, 1350000, 1350000, 1337500, 1325000, 1312500, 1300000, 1300000, 1300000, 1287500, 1275000, 1262500, 1250000},
+       {1500, 1362500, 1350000, 1337500, 1325000, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1250000, 1250000, 1237500, 1225000, 1212500, 1200000},
+       {1400, 1287500, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1175000, 1175000, 1162500, 1150000, 1137500, 1125000},
+       {1300, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1112500, 1112500, 1100000, 1087500, 1075000, 1062500},
+       {1200, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1062500, 1062500, 1050000, 1037500, 1025000, 1012500},
+       {1100, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1025000, 1025000, 1012500, 1000000,  987500,  975000},
+       {1000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000,  987500,  987500,  987500,  975000,  962500,  950000,  937500},
+       { 900, 1037500, 1025000, 1012500, 1000000,  987500,  975000,  962500,  950000,  950000,  937500,  937500,  950000,  937500,  925000,  912500,  900000},
+       { 800, 1012500, 1000000,  987500,  975000,  962500,  950000,  937500,  925000,  925000,  912500,  912500,  925000,  912500,  900000,  887500,  875000},
+       { 700,  975000,  962500,  950000,  937500,  925000,  912500,  900000,  887500,  887500,  875000,  875000,  887500,  875000,  862500,  850000,  837500},
+       { 600,  950000,  937500,  925000,  912500,  900000,  887500,  875000,  862500,  862500,  850000,  850000,  862500,  850000,  837500,  825000,  812500},
+       { 500,  925000,  912500,  900000,  887500,  875000,  862500,  850000,  837500,  837500,  825000,  825000,  837500,  825000,  812500,  800000,  787500},
+       { 400,  887500,  875000,  862500,  850000,  837500,  825000,  812500,  800000,  800000,  787500,  787500,  800000,  787500,  775000,  762500,  750000},
+       { 300,  862500,  837500,  825000,  812500,  800000,  787500,  775000,  762500,  762500,  750000,  750000,  762500,  750000,  737500,  725000,  725000},
+       { 200,  862500,  837500,  812500,  787500,  775000,  762500,  750000,  737500,  737500,  725000,  725000,  725000,  725000,  725000,  725000,  725000},
+};
+
+static const u32 base_addr_tbl[SYSC_DVFS_NUM][5] = {
+       [SYSC_DVFS_EGL] = { 0x4000, 0, 4, 8, 12 },
+       [SYSC_DVFS_KFC] = { 0x4000, 16, 20, 24, 28 },
+       [SYSC_DVFS_G3D] = { 0x4004, 0, 4, 8, 12 },
+       [SYSC_DVFS_MIF] = { 0x4004, 16, 20, 24, 28 },
+       [SYSC_DVFS_INT] = { 0x4008, 0, 4, 8, 12 },
+       [SYSC_DVFS_CAM] = { 0x4008, 16, 20, 24, 28 },
+
+};
+
+static unsigned int asv_table_version;
+static struct exynos_asv *exynos_asv;
+static unsigned int egl_ids;
+static unsigned int is_speed_group_fused;
+
+#define OTP_BANK_OFFSET        0x400
+
+unsigned int __asv_get_egl_ids(void)
+{
+       u32 fused_data = 0, data = 0;
+       size_t bytes_read;
+       int ret, i;
+
+       ret = mtd_read(otp, OTP_BANK_OFFSET * 3, sizeof(data), &bytes_read,
+                      (u_char *)&data);
+       if (!ret) {
+               for (i = 0; i < 8; i++)
+                       fused_data |= (((data >> (i * 2)) & 0x1) << i);
+       } else {
+               pr_err("ASV: mtd_read() failed: %d\n", ret);
+       }
+
+       if (fused_data)
+               return fused_data;
+
+       if (!exynos_chipid_read_bits(0x403c, 28, 0xf))
+               return exynos_chipid_abb_read(0) & 0xff;
+
+       return exynos_chipid_read(0x4030) & 0xff;
+}
+
+/* ATLAS */
+const u32 ids_table_v0[MAX_ASV_GROUP] = {
+     /* 0  1   2   3   4   5   6   7   8   9   10   11   12   13   14   15 */
+       1, 24, 30, 36, 43, 51, 61, 72, 84, 97, 110, 127, 144, 162, 168, 999
+};
+
+unsigned int __asv_get_ids_group(void)
+{
+       unsigned int group = 0;
+       int i;
+
+       /* Temporary workaround for the margin issue */
+       if (asv_table_version == 0)
+               return 0;
+
+       if (egl_ids >= ids_table_v0[MAX_ASV_GROUP - 1]) {
+               group = MAX_ASV_GROUP - 1;
+       /*else if (egl_ids <= ids_table_v0[0])
+               group = 0;*/
+       } else {
+               for (i = MAX_ASV_GROUP; i > 0; i--) {
+                       if (egl_ids > ids_table_v0[i - 1]) {
+                               group = i;
+                               break;
+                       }
+               }
+       }
+
+       if ((asv_table_version == 1) && (exynos_chipid_read(0x4000) & 0x1)) {
+               if (group < 4)
+                       group = 1;
+               else
+                       group -= 3; /* Group shift -3 for margin */
+       }
+
+       return group;
+}
+
+unsigned int __asv_get_match_subgroup(enum sysc_dvfs_sel id, int level)
+{
+       static const unsigned int __th[SYSC_DVFS_NUM][2] = {
+               { SYSC_DVFS_L8, SYSC_DVFS_L13 }, /* EGL */
+               { SYSC_DVFS_L8, SYSC_DVFS_L13 }, /* KFC */
+               { SYSC_DVFS_L5, SYSC_DVFS_L7 },  /* G3D */
+               { SYSC_DVFS_L0, SYSC_DVFS_L2 },  /* MIF */
+               { SYSC_DVFS_L0, SYSC_DVFS_L3 },  /* INT */
+               { SYSC_DVFS_L3, SYSC_DVFS_L4 },  /* CAM */
+       };
+
+       if (WARN(id >= SYSC_DVFS_NUM, "Invalid ID: %d\n", id))
+               return 0;
+
+       if (level <= __th[id][0])
+               return 0;
+       else if (level <= __th[id][1])
+               return 1;
+       else
+               return 2;
+}
+
+u32 __asv_get_lock_voltage(enum sysc_dvfs_sel id)
+{
+       u32 lockvalue;
+
+       lockvalue = exynos_chipid_read_bits(base_addr_tbl[id][0],
+                                           base_addr_tbl[id][4], 0xf);
+       if (lockvalue == 0)
+               return 0;
+
+       if (id == SYSC_DVFS_EGL)
+               return 85000 + lockvalue * 25000;
+
+       return 70000 + lockvalue * 25000;
+}
+
+u32 __asv_get_group(enum sysc_dvfs_sel id, unsigned int level)
+{
+       unsigned int subgroup, asv_group;
+
+       if (is_speed_group_fused) {
+               subgroup = __asv_get_match_subgroup(id, level);
+
+               asv_group = exynos_chipid_read_bits(base_addr_tbl[id][0],
+                                       base_addr_tbl[id][1 + subgroup], 0xf);
+       } else {
+               asv_group = __asv_get_ids_group();
+       }
+
+       WARN(asv_group >= MAX_ASV_GROUP, "Wrong ASV group\n");
+
+       return asv_group;
+}
+
+int is_max_limit_sample(void)
+{
+       if (exynos_chipid_read(0x403C) & 0x200000)
+               return 1;
+
+       return 0;
+}
+
+static int exynos5433_asv_opp_get_voltage(struct exynos_asv_subsys *subsys,
+                               int level, unsigned int freq, unsigned int volt)
+{
+       unsigned int asv_volt, lock_volt;
+       unsigned int asv_group;
+
+       if (level >= subsys->dvfs_nr)
+               return volt;
+
+       if (freq != subsys->asv_table[level][0])
+               return volt;
+
+       asv_group = __asv_get_group(subsys->id, level);
+       asv_volt = subsys->asv_table[level][asv_group + 1];
+
+       lock_volt = __asv_get_lock_voltage(subsys->id);
+       if (lock_volt > asv_volt)
+               asv_volt = lock_volt;
+
+       pr_info("%s: %s: [%d] freq: %u, voltage: %u -> %u\n", __func__,
+               subsys->cpu_dt_compat, level, freq, volt, asv_volt);
+
+       return asv_volt;
+}
+
+int exynos5433_asv_init(struct exynos_asv *asv)
+{
+       otp = get_mtd_device_nm("exynos5433-otp");
+       if (IS_ERR(otp)) {
+               pr_err("ASV: Missing OTP memory device\n");
+               return PTR_ERR(otp);
+       }
+
+       egl_ids = __asv_get_egl_ids();
+
+       is_speed_group_fused = exynos_chipid_read_bits(0x400c, 16, 0x1);
+       asv_table_version = exynos_chipid_read_bits(0x400c, 0, 0xf);
+
+       pr_info("%s: group_fused: %#x, table_version: %u, egl_ids: %#x\n",
+               __func__, is_speed_group_fused, asv_table_version, egl_ids);
+
+       if (is_max_limit_sample())
+               pr_info("%s: ATL maximum frequency limited\n", __func__);
+
+       if (asv_table_version == 0) {
+               asv->arm.asv_table = volt_table_egl_v0;
+               asv->kfc.asv_table = volt_table_kfc_v0;
+
+       } else if (asv_table_version <= 4) {
+               /* ASV table version: 1...4 */
+               asv->arm.asv_table = volt_table_egl_v1;
+               asv->kfc.asv_table = volt_table_kfc_v1;
+
+       } else if (asv_table_version == 5) {
+               asv->arm.asv_table = volt_table_egl_v2;
+               asv->kfc.asv_table = volt_table_kfc_v2;
+
+       } else if (asv_table_version <= 8) {
+               /* ASV table version: 6...8 */
+               asv->arm.asv_table = volt_table_egl_v3;
+               asv->kfc.asv_table = volt_table_kfc_v3;
+
+       } else {
+               WARN(1, "Wrong ASV table version: %#x\n", asv_table_version);
+       }
+
+       asv->arm.dvfs_nr = SYSC_DVFS_END_LVL_EGL;
+       asv->kfc.dvfs_nr = SYSC_DVFS_END_LVL_KFC;
+
+       asv->arm.cpu_dt_compat = "arm,cortex-a57";
+       asv->kfc.cpu_dt_compat = "arm,cortex-a53";
+
+       asv->arm.id = SYSC_DVFS_EGL;
+       asv->kfc.id = SYSC_DVFS_KFC;
+
+       asv->opp_get_voltage = exynos5433_asv_opp_get_voltage;
+
+       exynos_asv = asv;
+
+       return 0;
+}
+

diff --git a/drivers/soc/samsung/exynos5433-asv.h b/drivers/soc/samsung/exynos5433-asv.h
new file mode 100644 (file)
index 0000000..e7df107
--- /dev/null
+++ b/drivers/soc/samsung/exynos5433-asv.h
@@ -0,0 +1,67 @@
+/* linux/arch/arm/mach-exynos/include/mach/asv-exynos5433.h
+*
+* Copyright (c) 2014 Samsung Electronics Co., Ltd.
+*              http://www.samsung.com/
+*
+* EXYNOS5433 - Adaptive Support Voltage Header file
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 as
+* published by the Free Software Foundation.
+*/
+
+#ifndef EXYNOS5433_ASV_H__
+#define EXYNOS5433_ASV_H__
+
+struct exynos_asv;
+
+int exynos5433_asv_init(struct exynos_asv *asv);
+
+enum sysc_dvfs_level {
+       SYSC_DVFS_L0 = 0,
+       SYSC_DVFS_L1,
+       SYSC_DVFS_L2,
+       SYSC_DVFS_L3,
+       SYSC_DVFS_L4,
+       SYSC_DVFS_L5,
+       SYSC_DVFS_L6,
+       SYSC_DVFS_L7,
+       SYSC_DVFS_L8,
+       SYSC_DVFS_L9,
+       SYSC_DVFS_L10,
+       SYSC_DVFS_L11,
+       SYSC_DVFS_L12,
+       SYSC_DVFS_L13,
+       SYSC_DVFS_L14,
+       SYSC_DVFS_L15,
+       SYSC_DVFS_L16,
+       SYSC_DVFS_L17,
+       SYSC_DVFS_L18,
+       SYSC_DVFS_L19,
+       SYSC_DVFS_L20,
+       SYSC_DVFS_L21,
+       SYSC_DVFS_L22,
+       SYSC_DVFS_L23,
+       SYSC_DVFS_L24,
+};
+
+#define SYSC_DVFS_END_LVL_EGL          SYSC_DVFS_L24
+#define SYSC_DVFS_END_LVL_KFC          SYSC_DVFS_L19
+#define SYSC_DVFS_END_LVL_G3D          SYSC_DVFS_L10
+#define SYSC_DVFS_END_LVL_MIF          SYSC_DVFS_L10
+#define SYSC_DVFS_END_LVL_INT          SYSC_DVFS_L7
+#define SYSC_DVFS_END_LVL_DISP         SYSC_DVFS_L4
+#define SYSC_DVFS_END_LVL_CAM          SYSC_DVFS_L11
+#define MAX_ASV_GROUP                  16
+
+enum sysc_dvfs_sel {
+       SYSC_DVFS_EGL,
+       SYSC_DVFS_KFC,
+       SYSC_DVFS_INT,
+       SYSC_DVFS_MIF,
+       SYSC_DVFS_G3D,
+       SYSC_DVFS_CAM,
+       SYSC_DVFS_NUM
+};
+
+#endif /* EXYNOS5433_ASV_H__ */