drm/i915/cnl: WaPushConstantDereferenceHoldDisable
authorOscar Mateo <oscar.mateo@intel.com>
Wed, 23 Aug 2017 19:56:31 +0000 (12:56 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 23 Aug 2017 20:31:18 +0000 (13:31 -0700)
CS sometimes hangs on 3D Push Constant dispatches with the new
deref enhancement logic in CNL.

v2: Improve the commit message (Rodrigo)

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1503518191-19116-1-git-send-email-oscar.mateo@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_engine_cs.c

index d4ecb19..d9b0249 100644 (file)
@@ -8055,6 +8055,7 @@ enum {
 #define GEN7_ROW_CHICKEN2              _MMIO(0xe4f4)
 #define GEN7_ROW_CHICKEN2_GT2          _MMIO(0xf4f4)
 #define   DOP_CLOCK_GATING_DISABLE     (1<<0)
+#define   PUSH_CONSTANT_DEREF_DISABLE  (1<<8)
 
 #define HSW_ROW_CHICKEN3               _MMIO(0xe49c)
 #define  HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE    (1 << 6)
index d23f188..d7e1ccf 100644 (file)
@@ -1083,6 +1083,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
        WA_SET_BIT(GEN9_GAMT_ECO_REG_RW_IA,
                   GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
 
+       /* WaPushConstantDereferenceHoldDisable:cnl */
+       WA_SET_BIT(GEN7_ROW_CHICKEN2, PUSH_CONSTANT_DEREF_DISABLE);
+
        /* WaEnablePreemptionGranularityControlByUMD:cnl */
        ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1);
        if (ret)