drm/amdgpu:re-write sriov_reinit_early/late (v2)

1,this way we make those routines compatible with the sequence
  requirment for both Tonga and Vega10
2,ignore PSP hw init when doing TDR, because for SR-IOV device
the ucode won't get lost after VF FLR, so no need to invoke PSP
doing the ucode reloading again.

v2: squash in ARRAY_SIZE fix

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index c20ef33..9a7c0e4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1815,19 +1815,27 @@ static int amdgpu_sriov_reinit_early(struct amdgpu_device *adev)
 {
        int i, r;
 
-       for (i = 0; i < adev->num_ip_blocks; i++) {
-               if (!adev->ip_blocks[i].status.valid)
-                       continue;
-
-               if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON ||
-                               adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC ||
-                               adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH)
-                       r = adev->ip_blocks[i].version->funcs->hw_init(adev);
+       static enum amd_ip_block_type ip_order[] = {
+               AMD_IP_BLOCK_TYPE_GMC,
+               AMD_IP_BLOCK_TYPE_COMMON,
+               AMD_IP_BLOCK_TYPE_GFXHUB,
+               AMD_IP_BLOCK_TYPE_MMHUB,
+               AMD_IP_BLOCK_TYPE_IH,
+       };
+
+       for (i = 0; i < ARRAY_SIZE(ip_order); i++) {
+               int j;
+               struct amdgpu_ip_block *block;
+
+               for (j = 0; j < adev->num_ip_blocks; j++) {
+                       block = &adev->ip_blocks[j];
+
+                       if (block->version->type != ip_order[i] ||
+                               !block->status.valid)
+                               continue;
 
-               if (r) {
-                       DRM_ERROR("resume of IP block <%s> failed %d\n",
-                                 adev->ip_blocks[i].version->funcs->name, r);
-                       return r;
+                       r = block->version->funcs->hw_init(adev);
+                       DRM_INFO("RE-INIT: %s %s\n", block->version->funcs->name, r?"failed":"successed");
                }
        }
 
@@ -1838,20 +1846,27 @@ static int amdgpu_sriov_reinit_late(struct amdgpu_device *adev)
 {
        int i, r;
 
-       for (i = 0; i < adev->num_ip_blocks; i++) {
-               if (!adev->ip_blocks[i].status.valid)
-                       continue;
+       static enum amd_ip_block_type ip_order[] = {
+               AMD_IP_BLOCK_TYPE_SMC,
+               AMD_IP_BLOCK_TYPE_DCE,
+               AMD_IP_BLOCK_TYPE_GFX,
+               AMD_IP_BLOCK_TYPE_SDMA,
+               AMD_IP_BLOCK_TYPE_VCE,
+       };
 
-               if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON ||
-                               adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC ||
-                               adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH )
-                       continue;
+       for (i = 0; i < ARRAY_SIZE(ip_order); i++) {
+               int j;
+               struct amdgpu_ip_block *block;
 
-               r = adev->ip_blocks[i].version->funcs->hw_init(adev);
-               if (r) {
-                       DRM_ERROR("resume of IP block <%s> failed %d\n",
-                                 adev->ip_blocks[i].version->funcs->name, r);
-                       return r;
+               for (j = 0; j < adev->num_ip_blocks; j++) {
+                       block = &adev->ip_blocks[j];
+
+                       if (block->version->type != ip_order[i] ||
+                               !block->status.valid)
+                               continue;
+
+                       r = block->version->funcs->hw_init(adev);
+                       DRM_INFO("RE-INIT: %s %s\n", block->version->funcs->name, r?"failed":"successed");
                }
        }