arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850

Add missing clock domains to Exynos850 SoC device tree.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-9-semen.protsenko@linaro.org

diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
index 9076afd..8e78b50 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
@@ -286,6 +286,21 @@
                        clock-names = "oscclk";
                };
 
+               cmu_mfcmscl: clock-controller@12c00000 {
+                       compatible = "samsung,exynos850-cmu-mfcmscl";
+                       reg = <0x12c00000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&oscclk>,
+                                <&cmu_top CLK_DOUT_MFCMSCL_MFC>,
+                                <&cmu_top CLK_DOUT_MFCMSCL_M2M>,
+                                <&cmu_top CLK_DOUT_MFCMSCL_MCSC>,
+                                <&cmu_top CLK_DOUT_MFCMSCL_JPEG>;
+                       clock-names = "oscclk", "dout_mfcmscl_mfc",
+                                     "dout_mfcmscl_m2m", "dout_mfcmscl_mcsc",
+                                     "dout_mfcmscl_jpeg";
+               };
+
                cmu_dpu: clock-controller@13000000 {
                        compatible = "samsung,exynos850-cmu-dpu";
                        reg = <0x13000000 0x8000>;
@@ -308,6 +323,29 @@
                                      "dout_hsi_mmc_card", "dout_hsi_usb20drd";
                };
 
+               cmu_is: clock-controller@14500000 {
+                       compatible = "samsung,exynos850-cmu-is";
+                       reg = <0x14500000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&oscclk>,
+                                <&cmu_top CLK_DOUT_IS_BUS>,
+                                <&cmu_top CLK_DOUT_IS_ITP>,
+                                <&cmu_top CLK_DOUT_IS_VRA>,
+                                <&cmu_top CLK_DOUT_IS_GDC>;
+                       clock-names = "oscclk", "dout_is_bus", "dout_is_itp",
+                                     "dout_is_vra", "dout_is_gdc";
+               };
+
+               cmu_aud: clock-controller@14a00000 {
+                       compatible = "samsung,exynos850-cmu-aud";
+                       reg = <0x14a00000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&oscclk>, <&cmu_top CLK_DOUT_AUD>;
+                       clock-names = "oscclk", "dout_aud";
+               };
+
                pinctrl_alive: pinctrl@11850000 {
                        compatible = "samsung,exynos850-pinctrl";
                        reg = <0x11850000 0x1000>;