drm/i915/gvt: Use consist max display pipe numbers as i915 definition

GVT implements a homogeneous vGPU as host GPU so max vGPU display pipes
can't exceed HW. The inconsistency definition has potential risks which
could cause array indexing overflow.

Remove the unnecessary define of INTEL_GVT_MAX_PIPE and align with i915.

Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Colin Xu <colin.xu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 0ba4b42..db82a42 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -111,11 +111,9 @@ struct intel_vgpu_cfg_space {
 
 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space)
 
-#define INTEL_GVT_MAX_PIPE 4
-
 struct intel_vgpu_irq {
        bool irq_warn_once[INTEL_GVT_EVENT_MAX];
-       DECLARE_BITMAP(flip_done_event[INTEL_GVT_MAX_PIPE],
+       DECLARE_BITMAP(flip_done_event[I915_MAX_PIPES],
                       INTEL_GVT_EVENT_MAX);
 };