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[ARM] Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning....
author
Simon Pilgrim
<llvm-dev@redking.me.uk>
Wed, 8 Feb 2023 15:27:00 +0000
(15:27 +0000)
committer
Simon Pilgrim
<llvm-dev@redking.me.uk>
Wed, 8 Feb 2023 15:27:05 +0000
(15:27 +0000)
Use APInt::setBit() method instead of OR'ing individual bits.
llvm/lib/Target/ARM/ARMISelLowering.cpp
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diff --git
a/llvm/lib/Target/ARM/ARMISelLowering.cpp
b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index
e664701
..
6370ac3
100644
(file)
--- a/
llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/
llvm/lib/Target/ARM/ARMISelLowering.cpp
@@
-17139,7
+17139,7
@@
static SDValue PerformReduceShuffleCombine(SDNode *N, SelectionDAG &DAG) {
for (int E : Mask) {
if (E < 0 || E >= (int)Mask.size())
return SDValue();
- SetElts
|= 1 << E
;
+ SetElts
.setBit(E)
;
}
if (!SetElts.isAllOnes())
return SDValue();