drm/bridge: nwl-dsi: Remove a check on unchanged HS clock rate from ->mode_set()
authorLiu Ying <victor.liu@nxp.com>
Fri, 23 Apr 2021 09:26:42 +0000 (17:26 +0800)
committerNeil Armstrong <narmstrong@baylibre.com>
Fri, 30 Apr 2021 08:39:27 +0000 (10:39 +0200)
The check on unchanged HS clock rate in ->mode_set() improves
the callback's performance a bit by early return.  However,
the up-coming patch would get MIPI DSI controller and PHY ready
in ->mode_set() after that check, thus likely skipped.
So, this patch removes that check to make sure MIPI DSI controller
and PHY will be brought up and taken down from ->mode_set() and
->atomic_disable() respectively in pairs.

Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Guido Günther <agx@sigxcpu.org>
Cc: Robert Chiras <robert.chiras@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1619170003-4817-3-git-send-email-victor.liu@nxp.com
drivers/gpu/drm/bridge/nwl-dsi.c

index c65ca86..601ccc4 100644 (file)
@@ -856,13 +856,6 @@ nwl_dsi_bridge_mode_set(struct drm_bridge *bridge,
        if (ret < 0)
                return;
 
-       /*
-        * If hs clock is unchanged, we're all good - all parameters are
-        * derived from it atm.
-        */
-       if (new_cfg.mipi_dphy.hs_clk_rate == dsi->phy_cfg.mipi_dphy.hs_clk_rate)
-               return;
-
        phy_ref_rate = clk_get_rate(dsi->phy_ref_clk);
        DRM_DEV_DEBUG_DRIVER(dev, "PHY at ref rate: %lu\n", phy_ref_rate);
        /* Save the new desired phy config */