clk: socfpga: use clk_hw_register for a5/c5

As recommended by Stephen Boyd, convert the cyclone5/arria5 clock driver
to use the clk_hw registration method.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210302214151.1333447-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c
index 43ecd507bf836b77e4a9a754499dd3eb3199d28b..b17aba5799d227fff4d20ff950ce082e1c11479b 100644 (file)
--- a/drivers/clk/socfpga/clk-gate.c
+++ b/drivers/clk/socfpga/clk-gate.c
@@ -174,13 +174,14 @@ void __init socfpga_gate_init(struct device_node *node)
        u32 div_reg[3];
        u32 clk_phase[2];
        u32 fixed_div;
-       struct clk *clk;
+       struct clk_hw *hw_clk;
        struct socfpga_gate_clk *socfpga_clk;
        const char *clk_name = node->name;
        const char *parent_name[SOCFPGA_MAX_PARENTS];
        struct clk_init_data init;
        struct clk_ops *ops;
        int rc;
+       int err;
 
        socfpga_clk = kzalloc(sizeof(*socfpga_clk), GFP_KERNEL);
        if (WARN_ON(!socfpga_clk))
@@ -238,12 +239,14 @@ void __init socfpga_gate_init(struct device_node *node)
        init.parent_names = parent_name;
        socfpga_clk->hw.hw.init = &init;
 
-       clk = clk_register(NULL, &socfpga_clk->hw.hw);
-       if (WARN_ON(IS_ERR(clk))) {
+       hw_clk = &socfpga_clk->hw.hw;
+
+       err = clk_hw_register(NULL, hw_clk);
+       if (err) {
                kfree(socfpga_clk);
                return;
        }
-       rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+       rc = of_clk_add_provider(node, of_clk_src_simple_get, hw_clk);
        if (WARN_ON(rc))
                return;
 }

diff --git a/drivers/clk/socfpga/clk-periph.c b/drivers/clk/socfpga/clk-periph.c
index 5e0c4b45f77f7e4bb490902f7255bb2440090f62..43707e2d724840dfaabc0473d25f9c1c3843b32f 100644 (file)
--- a/drivers/clk/socfpga/clk-periph.c
+++ b/drivers/clk/socfpga/clk-periph.c
@@ -51,7 +51,7 @@ static __init void __socfpga_periph_init(struct device_node *node,
        const struct clk_ops *ops)
 {
        u32 reg;
-       struct clk *clk;
+       struct clk_hw *hw_clk;
        struct socfpga_periph_clk *periph_clk;
        const char *clk_name = node->name;
        const char *parent_name[SOCFPGA_MAX_PARENTS];
@@ -94,13 +94,13 @@ static __init void __socfpga_periph_init(struct device_node *node,
        init.parent_names = parent_name;
 
        periph_clk->hw.hw.init = &init;
+       hw_clk = &periph_clk->hw.hw;
 
-       clk = clk_register(NULL, &periph_clk->hw.hw);
-       if (WARN_ON(IS_ERR(clk))) {
+       if (clk_hw_register(NULL, hw_clk)) {
                kfree(periph_clk);
                return;
        }
-       rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+       rc = of_clk_add_provider(node, of_clk_src_simple_get, hw_clk);
 }
 
 void __init socfpga_periph_init(struct device_node *node)

diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c
index 3cf99df7d005634e4d4a3cdf74dae1a77307f6bd..dcb573d4403469efe4549af15622e94ba5f5235d 100644 (file)
--- a/drivers/clk/socfpga/clk-pll.c
+++ b/drivers/clk/socfpga/clk-pll.c
@@ -70,16 +70,18 @@ static const struct clk_ops clk_pll_ops = {
        .get_parent = clk_pll_get_parent,
 };
 
-static __init struct clk *__socfpga_pll_init(struct device_node *node,
+static __init struct clk_hw *__socfpga_pll_init(struct device_node *node,
        const struct clk_ops *ops)
 {
        u32 reg;
-       struct clk *clk;
+       struct clk_hw *hw_clk;
        struct socfpga_pll *pll_clk;
        const char *clk_name = node->name;
        const char *parent_name[SOCFPGA_MAX_PARENTS];
        struct clk_init_data init;
        struct device_node *clkmgr_np;
+       int rc;
+       int err;
 
        of_property_read_u32(node, "reg", &reg);
 
@@ -105,13 +107,15 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node,
 
        pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA;
 
-       clk = clk_register(NULL, &pll_clk->hw.hw);
-       if (WARN_ON(IS_ERR(clk))) {
+       hw_clk = &pll_clk->hw.hw;
+
+       err = clk_hw_register(NULL, hw_clk);
+       if (err) {
                kfree(pll_clk);
-               return NULL;
+               return ERR_PTR(err);
        }
-       of_clk_add_provider(node, of_clk_src_simple_get, clk);
-       return clk;
+       rc = of_clk_add_provider(node, of_clk_src_simple_get, hw_clk);
+       return hw_clk;
 }
 
 void __init socfpga_pll_init(struct device_node *node)