vdin: add vdin support for tm2 [1/1]
authorNian Jing <nian.jing@amlogic.com>
Thu, 4 Apr 2019 12:46:46 +0000 (20:46 +0800)
committerJianxiong Pan <jianxiong.pan@amlogic.com>
Thu, 11 Apr 2019 06:18:14 +0000 (14:18 +0800)
PD#SWPL-6701

Problem:
Need vdin supprt for sm2

Solution:
add vdin support for tm2

Verify:
test pass on tm2 ab311

Change-Id: I57d7b3014938011d18c5e168f18c78e4fa542fc7
Signed-off-by: Nian Jing <nian.jing@amlogic.com>
drivers/amlogic/media/vin/tvin/bt656/bt656_601_in.c
drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c
drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c
drivers/amlogic/media/vin/tvin/viu/viuin.c

index 0feac45..4f02b42 100644 (file)
@@ -1129,7 +1129,8 @@ static int amvdec_656in_probe(struct platform_device *pdev)
 
        if (is_meson_gxtvbb_cpu() || is_meson_gxl_cpu() ||
                is_meson_gxm_cpu() || is_meson_g12a_cpu() ||
-               is_meson_g12b_cpu() || is_meson_tl1_cpu()) {
+               is_meson_g12b_cpu() || is_meson_tl1_cpu() ||
+               is_meson_tm2_cpu()) {
                hw_cnt = 1;
        } else if (is_meson_gxbb_cpu()) {
                hw_cnt = 2;
index f551ce0..75a1599 100644 (file)
@@ -665,7 +665,8 @@ static void vdin_set_meas_mux(unsigned int offset, enum tvin_port_e port_,
                        meas_mux = MEAS_MUX_656_B;
                else if ((is_meson_gxl_cpu() || is_meson_gxm_cpu() ||
                        is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-                       is_meson_tl1_cpu() || is_meson_sm1_cpu()) &&
+                       is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+                       is_meson_tm2_cpu()) &&
                        (bt_path == BT_PATH_GPIO))
                        meas_mux = MEAS_MUX_656;
                else
@@ -777,7 +778,8 @@ void vdin_set_top(unsigned int offset,
                                VDI9_ASFIFO_CTRL_BIT, VDI9_ASFIFO_CTRL_WID);
                } else if ((is_meson_gxm_cpu() || is_meson_gxl_cpu() ||
                        is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-                       is_meson_tl1_cpu() || is_meson_sm1_cpu()) &&
+                       is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+                       is_meson_tm2_cpu()) &&
                        (bt_path == BT_PATH_GPIO)) {
                        vdin_mux = VDIN_MUX_656;
                        wr_bits(offset, VDIN_ASFIFO_CTRL0, 0xe4,
@@ -828,7 +830,8 @@ void vdin_set_top(unsigned int offset,
                                VDI6_ASFIFO_CTRL_BIT, VDI6_ASFIFO_CTRL_WID);
                else {
                        if (/*is_meson_gxlx2_cpu() || */is_meson_g12b_cpu()
-                               || is_meson_tl1_cpu() || is_meson_sm1_cpu())
+                               || is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+                               is_meson_tm2_cpu())
                                wr_bits(offset, VDIN_ASFIFO_CTRL3, 0xd4,
                                        VDI6_ASFIFO_CTRL_BIT,
                                        VDI6_ASFIFO_CTRL_WID);
@@ -845,7 +848,8 @@ void vdin_set_top(unsigned int offset,
                                VDI8_ASFIFO_CTRL_BIT, VDI8_ASFIFO_CTRL_WID);
                else {
                        if (/*is_meson_gxlx2_cpu() || */is_meson_g12b_cpu()
-                               || is_meson_tl1_cpu() || is_meson_sm1_cpu())
+                               || is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+                               is_meson_tm2_cpu())
                                wr_bits(offset, VDIN_ASFIFO_CTRL3, 0xd4,
                                        VDI6_ASFIFO_CTRL_BIT,
                                        VDI6_ASFIFO_CTRL_WID);
@@ -1589,7 +1593,7 @@ void vdin_set_matrix(struct vdin_dev_s *devp)
                wr_bits(offset, VDIN_MATRIX_CTRL, 0,
                                VDIN_MATRIX1_EN_BIT, VDIN_MATRIX1_EN_WID);
                if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-                       is_meson_sm1_cpu())
+                       is_meson_sm1_cpu() || is_meson_tm2_cpu())
                        vdin_set_color_matrix0_g12a(devp->addr_offset,
                                devp->fmt_info_p,
                                devp->format_convert,
@@ -1623,7 +1627,7 @@ void vdin_set_matrix(struct vdin_dev_s *devp)
                                devp->prop.vdin_hdr_Flag,
                                devp->color_range_mode);
                if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-                       is_meson_sm1_cpu())
+                       is_meson_sm1_cpu() || is_meson_tm2_cpu())
                        vdin_set_color_matrix0_g12a(devp->addr_offset,
                                devp->fmt_info_p,
                                devp->format_convert,
@@ -1659,7 +1663,7 @@ void vdin_set_matrixs(struct vdin_dev_s *devp, unsigned char id,
        switch (id) {
        case 0:
                if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-                       is_meson_sm1_cpu())
+                       is_meson_sm1_cpu() || is_meson_tm2_cpu())
                        vdin_set_color_matrix0_g12a(devp->addr_offset,
                                devp->fmt_info_p,
                                devp->format_convert,
@@ -1709,7 +1713,8 @@ void vdin_set_prob_xy(unsigned int offset,
                        devp->prop.color_fmt_range,
                        devp->prop.vdin_hdr_Flag,
                        devp->color_range_mode);
-       if (is_meson_g12a_cpu() || is_meson_g12b_cpu() || is_meson_sm1_cpu())
+       if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
+               is_meson_sm1_cpu() || is_meson_tm2_cpu())
                vdin_set_color_matrix0_g12a(devp->addr_offset,
                        devp->fmt_info_p,
                        devp->format_convert,
@@ -2723,6 +2728,8 @@ void vdin_set_default_regmap(unsigned int offset)
                is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
                is_meson_txlx_cpu() || is_meson_tl1_cpu())
                wr(offset, VDIN_LFIFO_CTRL,     0x00000f00);
+       else if (is_meson_tm2_cpu())
+               wr(offset, VDIN_LFIFO_CTRL,     0xc0020f00);
        else
                wr(offset, VDIN_LFIFO_CTRL,     0x00000780);
        /* [15:14]     clkgate.bbar             = 0/(auto, off, on, on) */
index 08b6059..844c1fb 100644 (file)
@@ -300,7 +300,7 @@ static void vdin_game_mode_check(struct vdin_dev_s *devp)
                (devp->parm.port != TVIN_PORT_CVBS3)) {
                if (devp->h_active > 720 && ((devp->parm.info.fps == 50) ||
                        (devp->parm.info.fps == 60)))
-                       if (is_meson_tl1_cpu()) {
+                       if (is_meson_tl1_cpu() || is_meson_tm2_cpu()) {
                                devp->game_mode = (VDIN_GAME_MODE_0 |
                                        VDIN_GAME_MODE_1 |
                                        VDIN_GAME_MODE_SWITCH_EN);
@@ -611,7 +611,7 @@ void vdin_start_dec(struct vdin_dev_s *devp)
        vdin_hw_enable(devp->addr_offset);
        vdin_set_all_regs(devp);
 
-       if (is_meson_tl1_cpu()) {
+       if (is_meson_tl1_cpu() || is_meson_tm2_cpu()) {
                if (devp->afbce_mode == 0)
                        vdin_write_mif_or_afbce(devp, VDIN_OUTPUT_TO_MIF);
                else if (devp->afbce_mode == 1)
@@ -672,7 +672,8 @@ void vdin_start_dec(struct vdin_dev_s *devp)
                                devp->index, jiffies_to_msecs(jiffies),
                                jiffies_to_msecs(jiffies)-devp->start_time);
 
-       if ((devp->afbce_mode == 1) && is_meson_tl1_cpu()) {
+       if ((devp->afbce_mode == 1) &&
+                       (is_meson_tl1_cpu() || is_meson_tm2_cpu())) {
                if ((devp->h_active >= 1920) && (devp->v_active >= 1080)) {
                        tl1_vdin1_preview_flag = 1;
                        tl1_vdin1_data_readied = 0;
@@ -717,7 +718,8 @@ void vdin_stop_dec(struct vdin_dev_s *devp)
        disable_irq_nosync(devp->irq);
        afbc_init_flag[devp->index] = 0;
 
-       if (is_meson_tl1_cpu() && (devp->afbce_mode == 1)) {
+       if ((is_meson_tl1_cpu() || is_meson_tm2_cpu())
+                       && (devp->afbce_mode == 1)) {
                while (i++ < afbc_write_down_timeout) {
                        if (vdin_afbce_read_writedown_flag())
                                break;
@@ -759,7 +761,8 @@ void vdin_stop_dec(struct vdin_dev_s *devp)
                vf_unreg_provider(&devp->vprov);
        devp->dv.dv_config = 0;
 
-       if (is_meson_tl1_cpu() && (devp->afbce_mode == 1)) {
+       if ((is_meson_tl1_cpu() || is_meson_tm2_cpu())
+                       && (devp->afbce_mode == 1)) {
                vdin_afbce_hw_disable();
                vdin_afbce_soft_reset();
        }
@@ -1439,7 +1442,8 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
 
        offset = devp->addr_offset;
 
-       if (is_meson_tl1_cpu() && (devp->afbce_mode == 1)) {
+       if ((is_meson_tl1_cpu() || is_meson_tm2_cpu())
+                       && (devp->afbce_mode == 1)) {
                if (afbc_init_flag[devp->index] == 0) {
                        afbc_init_flag[devp->index] = 1;
                        /*set mem power on*/
@@ -1908,7 +1912,7 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
                        vdin_vf_disp_mode_update(curr_wr_vfe, devp->vfp);
        }
        /*switch to game mode 2 from game mode 1,otherwise may appear blink*/
-       if (is_meson_tl1_cpu()) {
+       if (is_meson_tl1_cpu() || is_meson_tm2_cpu()) {
                if (devp->game_mode & VDIN_GAME_MODE_SWITCH_EN) {
                        /* make sure phase lock for next few frames */
                        if (vlock_get_phlock_flag())
@@ -2316,7 +2320,8 @@ static int vdin_open(struct inode *inode, struct file *file)
                return 0;
        }
 
-       if (is_meson_tl1_cpu() && (devp->afbce_mode == 1))
+       if ((devp->afbce_mode == 1) &&
+               (is_meson_tl1_cpu() || is_meson_tm2_cpu()))
                switch_vpu_mem_pd_vmod(VPU_AFBCE, VPU_MEM_POWER_ON);
 
        devp->flags |= VDIN_FLAG_FS_OPENED;
@@ -2365,7 +2370,8 @@ static int vdin_release(struct inode *inode, struct file *file)
                return 0;
        }
 
-       if (is_meson_tl1_cpu() && (devp->afbce_mode == 1))
+       if ((devp->afbce_mode == 1) &&
+               (is_meson_tl1_cpu() || is_meson_tm2_cpu()))
                switch_vpu_mem_pd_vmod(VPU_AFBCE, VPU_MEM_POWER_DOWN);
 
        devp->flags &= (~VDIN_FLAG_FS_OPENED);
@@ -3015,7 +3021,8 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
                        return -EFAULT;
                }
                memset(&param, 0, sizeof(struct vdin_parm_s));
-               if (is_meson_tl1_cpu() || is_meson_sm1_cpu())
+               if (is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+                       is_meson_tm2_cpu())
                        param.port = TVIN_PORT_VIU1_WB0_VPP;
                else
                        param.port = TVIN_PORT_VIU1;
@@ -3307,7 +3314,8 @@ static int vdin_drv_probe(struct platform_device *pdev)
        } else {
                vdevp->afbce_mode = val & 0xf;
                vdevp->afbce_lossy_en = (val>>4)&0xf;
-               if ((is_meson_tl1_cpu()) && (vdevp->index == 0)) {
+               if ((is_meson_tl1_cpu() || is_meson_tm2_cpu()) &&
+                       (vdevp->index == 0)) {
                        /* just use afbce at vdin0 */
                        pr_info("afbce mode = %d\n", vdevp->afbce_mode);
                        pr_info("afbce loosy en = %d\n", vdevp->afbce_lossy_en);
@@ -3340,13 +3348,15 @@ static int vdin_drv_probe(struct platform_device *pdev)
        if (is_meson_gxbb_cpu() && vdevp->index)
                vdin_addr_offset[vdevp->index] = 0x70;
        else if ((is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-               is_meson_tl1_cpu() || is_meson_sm1_cpu()) && vdevp->index)
+               is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+               is_meson_tm2_cpu()) && vdevp->index)
                vdin_addr_offset[vdevp->index] = 0x100;
        vdevp->addr_offset = vdin_addr_offset[vdevp->index];
        vdevp->flags = 0;
        /*canvas align number*/
        if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-               is_meson_tl1_cpu() || is_meson_sm1_cpu())
+               is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+               is_meson_tm2_cpu())
                vdevp->canvas_align = 64;
        else
                vdevp->canvas_align = 32;
index d655d3d..5b17e7a 100644 (file)
@@ -181,8 +181,9 @@ static int viuin_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
        /*open the venc to vdin path*/
        switch (rd_bits_viu(VPU_VIU_VENC_MUX_CTRL, 0, 2)) {
        case 0:
-               if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
-                       || is_meson_tl1_cpu() || is_meson_sm1_cpu())
+               if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
+                       is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+                       is_meson_tm2_cpu())
                        viu_mux = 0x4;
                else
                        viu_mux = 0x8;
@@ -217,7 +218,8 @@ static int viuin_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
        } else
                wr_bits_viu(VPU_VIU2VDIN_HDN_CTRL, devp->parm.h_active, 0, 14);
        if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
-               is_meson_tl1_cpu() || is_meson_sm1_cpu()) {
+               is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+               is_meson_tm2_cpu()) {
                if (((port >= TVIN_PORT_VIU1_WB0_VD1) &&
                        (port <= TVIN_PORT_VIU1_WB0_POST_BLEND)) ||
                        ((port >= TVIN_PORT_VIU2_WB0_VD1) &&
@@ -320,8 +322,9 @@ static void viuin_close(struct tvin_frontend_s *fe)
        if (open_cnt)
                open_cnt--;
        if (open_cnt == 0) {
-               if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
-                       || is_meson_tl1_cpu() || is_meson_sm1_cpu()) {
+               if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
+                       is_meson_tl1_cpu() || is_meson_sm1_cpu() ||
+                       is_meson_tm2_cpu()) {
                        wr_viu(VPU_VIU_VDIN_IF_MUX_CTRL, 0);
                        wr_viu(VPP_WRBAK_CTRL, 0);