arm64/sysreg: Convert ID_AA64SMFR0_EL1 to automatic generation

Convert ID_AA64SMFR0_EL1 to automatic register generation as per DDI0487H.a,
no functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-28-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index ee7ecba..2e2b581 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -193,7 +193,6 @@
 #define SYS_ID_AA64PFR0_EL1            sys_reg(3, 0, 0, 4, 0)
 #define SYS_ID_AA64PFR1_EL1            sys_reg(3, 0, 0, 4, 1)
 #define SYS_ID_AA64ZFR0_EL1            sys_reg(3, 0, 0, 4, 4)
-#define SYS_ID_AA64SMFR0_EL1           sys_reg(3, 0, 0, 4, 5)
 
 #define SYS_ID_AA64DFR0_EL1            sys_reg(3, 0, 0, 5, 0)
 #define SYS_ID_AA64DFR1_EL1            sys_reg(3, 0, 0, 5, 1)
@@ -760,23 +759,6 @@
 #define ID_AA64ZFR0_EL1_AES_PMULL128   0x2
 #define ID_AA64ZFR0_EL1_SVEver_SVE2    0x1
 
-/* id_aa64smfr0 */
-#define ID_AA64SMFR0_EL1_FA64_SHIFT            63
-#define ID_AA64SMFR0_EL1_I16I64_SHIFT  52
-#define ID_AA64SMFR0_EL1_F64F64_SHIFT  48
-#define ID_AA64SMFR0_EL1_I8I32_SHIFT   36
-#define ID_AA64SMFR0_EL1_F16F32_SHIFT  35
-#define ID_AA64SMFR0_EL1_B16F32_SHIFT  34
-#define ID_AA64SMFR0_EL1_F32F32_SHIFT  32
-
-#define ID_AA64SMFR0_EL1_FA64_IMP      0x1
-#define ID_AA64SMFR0_EL1_I16I64_IMP    0xf
-#define ID_AA64SMFR0_EL1_F64F64_IMP    0x1
-#define ID_AA64SMFR0_EL1_I8I32_IMP     0xf
-#define ID_AA64SMFR0_EL1_F16F32_IMP    0x1
-#define ID_AA64SMFR0_EL1_B16F32_IMP    0x1
-#define ID_AA64SMFR0_EL1_F32F32_IMP    0x1
-
 /* id_aa64mmfr0 */
 #define ID_AA64MMFR0_ECV_SHIFT         60
 #define ID_AA64MMFR0_FGT_SHIFT         56

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 13b8f85..b5c4251 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -46,6 +46,43 @@
 # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
 # item ACCDATA) though it may be more taseful to do something else.
 
+Sysreg ID_AA64SMFR0_EL1        3       0       0       4       5
+Enum   63      FA64
+       0b0     NI
+       0b1     IMP
+EndEnum
+Res0   62:60
+Field  59:56   SMEver
+Enum   55:52   I16I64
+       0b0000  NI
+       0b1111  IMP
+EndEnum
+Res0   51:49
+Enum   48      F64F64
+       0b0     NI
+       0b1     IMP
+EndEnum
+Res0   47:40
+Enum   39:36   I8I32
+       0b0000  NI
+       0b1111  IMP
+EndEnum
+Enum   35      F16F32
+       0b0     NI
+       0b1     IMP
+EndEnum
+Enum   34      B16F32
+       0b0     NI
+       0b1     IMP
+EndEnum
+Res0   33
+Enum   32      F32F32
+       0b0     NI
+       0b1     IMP
+EndEnum
+Res0   31:0
+EndSysreg
+
 Sysreg ID_AA64ISAR0_EL1        3       0       0       6       0
 Enum   63:60   RNDR
        0b0000  NI