PD#SWPL-14306
Problem:
When sr0 v scaler is enabled or not, the sr0 max width
is incorrectly.
Solution:
Using the correct sr0 max width.
Verify:
Verified by u212
Change-Id: Id5e0b66f0878676536be0e0970fe8f26419b978c
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
sr_reg_offt = sr->sr_reg_offt;
sr_reg_offt2 = sr->sr_reg_offt2;
/* just work around for g12a not to disable sr core2 bit2 */
- if (is_meson_g12a_cpu() && (reg_srscl0_vert_ratio == 0))
- sr_core0_max_width = sr->core0_v_enable_width_max;
- else
+ if (reg_srscl0_vert_ratio == 0)
sr_core0_max_width = sr->core0_v_disable_width_max;
+ else
+ sr_core0_max_width = sr->core0_v_enable_width_max;
/* top config */
tmp_data = VSYNC_RD_MPEG_REG(VPP_SRSHARP0_CTRL);