x86/cpu/amd: Derive L3 shared_cpu_map from cpu_llc_shared_mask
authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Mon, 31 Jul 2017 08:51:59 +0000 (10:51 +0200)
committerIngo Molnar <mingo@kernel.org>
Thu, 10 Aug 2017 15:37:43 +0000 (17:37 +0200)
For systems with X86_FEATURE_TOPOEXT, current logic uses the APIC ID
to calculate shared_cpu_map. However, APIC IDs are not guaranteed to
be contiguous for cores across different L3s (e.g. family17h system
w/ downcore configuration). This breaks the logic, and results in an
incorrect L3 shared_cpu_map.

Instead, always use the previously calculated cpu_llc_shared_mask of
each CPU to derive the L3 shared_cpu_map.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20170731085159.9455-3-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/intel_cacheinfo.c

index c55fb2c..24f7493 100644 (file)
@@ -811,7 +811,24 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index,
        struct cacheinfo *this_leaf;
        int i, sibling;
 
-       if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
+       /*
+        * For L3, always use the pre-calculated cpu_llc_shared_mask
+        * to derive shared_cpu_map.
+        */
+       if (index == 3) {
+               for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
+                       this_cpu_ci = get_cpu_cacheinfo(i);
+                       if (!this_cpu_ci->info_list)
+                               continue;
+                       this_leaf = this_cpu_ci->info_list + index;
+                       for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {
+                               if (!cpu_online(sibling))
+                                       continue;
+                               cpumask_set_cpu(sibling,
+                                               &this_leaf->shared_cpu_map);
+                       }
+               }
+       } else if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
                unsigned int apicid, nshared, first, last;
 
                this_leaf = this_cpu_ci->info_list + index;
@@ -839,19 +856,6 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index,
                                                &this_leaf->shared_cpu_map);
                        }
                }
-       } else if (index == 3) {
-               for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
-                       this_cpu_ci = get_cpu_cacheinfo(i);
-                       if (!this_cpu_ci->info_list)
-                               continue;
-                       this_leaf = this_cpu_ci->info_list + index;
-                       for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {
-                               if (!cpu_online(sibling))
-                                       continue;
-                               cpumask_set_cpu(sibling,
-                                               &this_leaf->shared_cpu_map);
-                       }
-               }
        } else
                return 0;