LLVM_MARK_AS_BITMASK_ENUM(LMUL1),
};
-struct Policy {
- bool IsUnspecified = false;
+class Policy {
+public:
enum PolicyType {
Undisturbed,
Agnostic,
};
- PolicyType TailPolicy = Agnostic;
- PolicyType MaskPolicy = Agnostic;
+
+private:
+ const bool IsUnspecified = false;
+ // The default assumption for an RVV instruction is TAMA, as an undisturbed
+ // policy generally will affect the performance of an out-of-order core.
+ const PolicyType TailPolicy = Agnostic;
+ const PolicyType MaskPolicy = Agnostic;
bool HasTailPolicy, HasMaskPolicy;
+
+public:
Policy(bool HasTailPolicy, bool HasMaskPolicy)
: IsUnspecified(true), HasTailPolicy(HasTailPolicy),
HasMaskPolicy(HasMaskPolicy) {}
return IntrinsicTypes;
}
Policy getPolicyAttrs() const {
- assert(PolicyAttrs.IsUnspecified == false);
return PolicyAttrs;
}
unsigned getPolicyAttrsBits() const {
// The 1st bit simulates the `vma` of RVV
// int PolicyAttrs = 0;
- assert(PolicyAttrs.IsUnspecified == false);
-
if (PolicyAttrs.isTUMAPolicy())
return 2;
if (PolicyAttrs.isTAMAPolicy())