Merge tag 'JH7110_515_SDK_v3.1.0' into vf2-515-devel
authorJianlong Huang <jianlong.huang@starfivetech.com>
Sat, 19 Nov 2022 14:51:04 +0000 (22:51 +0800)
committerJianlong Huang <jianlong.huang@starfivetech.com>
Sat, 19 Nov 2022 14:51:04 +0000 (22:51 +0800)
version JH7110_515_SDK_v3.1.0 for JH7110 EVB board

1  2 
arch/riscv/boot/dts/starfive/jh7110.dtsi
drivers/gpu/drm/verisilicon/starfive_drm_dsi.c
drivers/gpu/drm/verisilicon/starfive_drm_seeedpanel.c
drivers/gpu/drm/verisilicon/vs_crtc.c
drivers/gpu/drm/verisilicon/vs_dc.c
drivers/gpu/drm/verisilicon/vs_dc.h
drivers/gpu/drm/verisilicon/vs_drv.h
drivers/media/platform/starfive/v4l2_driver/imx219_mipi.c
drivers/pci/controller/pcie-plda.c

index 48ec761,65bcf9f..0ffbe49
mode 100755,100644..100644
@@@ -810,10 -811,13 +811,12 @@@ static void vs_dc_enable(struct device 
                        clk_set_rate(dc->dc8200_pix0, mode->clock * 1000);
                        dc->pix_clk_rate = mode->clock;
                }
+               */
  
                clk_set_parent(dc->dc8200_clk_pix1, dc->dc8200_pix0);
 -              udelay(1000);
                dc_hw_set_out(&dc->hw, OUT_DPI, display.id);
        } else {
+               /*
                if (dc->pix_clk_rate != mode->clock) {
                        clk_set_rate(dc->dc8200_pix0, mode->clock * 1000);
                        dc->pix_clk_rate = mode->clock;
Simple merge