ASoC: SOF: Intel: MTL: Enable DMI L1
authorRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Mon, 20 Feb 2023 07:58:04 +0000 (09:58 +0200)
committerMark Brown <broonie@kernel.org>
Sun, 5 Mar 2023 23:37:33 +0000 (23:37 +0000)
DMI L1 should be enabled unconditionally after FW boot is complete.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20230220075804.4829-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/mtl.c
sound/soc/sof/intel/mtl.h

index 307faad..216fd07 100644 (file)
@@ -280,6 +280,9 @@ static int mtl_dsp_post_fw_run(struct snd_sof_dev *sdev)
        }
 
        hda_sdw_int_enable(sdev, true);
+
+       /* enable DMI L1 */
+       snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, MTL_EM2, MTL_EM2_L1SEN, MTL_EM2_L1SEN);
        return 0;
 }
 
index 26418fb..ddc0530 100644 (file)
@@ -28,6 +28,8 @@
 #define MTL_HFINTIPPTR_PTR_MASK                GENMASK(20, 0)
 
 #define MTL_HDA_VS_D0I3C               0x1D4A
+#define MTL_EM2                                0x1c44
+#define MTL_EM2_L1SEN                  BIT(13)
 
 #define MTL_DSP2CXCAP_PRIMARY_CORE     0x178D00
 #define MTL_DSP2CXCTL_PRIMARY_CORE     0x178D04