intel_reg_dumper: handle 3 pipe configs when dumping HDMI config

Could be on pipe A, B, or C.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 308f597..3797de6 100644 (file)
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -3261,6 +3261,7 @@ typedef enum {
 /* CPU: FDI_TX */
 #define FDI_TXA_CTL            0x60100
 #define FDI_TXB_CTL            0x61100
+#define FDI_TXC_CTL            0x62100
 #define  FDI_TX_DISABLE                (0<<31)
 #define  FDI_TX_ENABLE         (1<<31)
 #define  FDI_LINK_TRAIN_PATTERN_1      (0<<28)

diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 75b3bc1..021e4cc 100644 (file)
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1319,7 +1319,8 @@ DEBUGSTRING(ironlake_debug_pf_win)
 
 DEBUGSTRING(ironlake_debug_hdmi)
 {
-       char *enable, pipe, *bpc = NULL, *encoding;
+       int pipe;
+       char *enable, *bpc = NULL, *encoding;
        char *mode, *audio, *vsync, *hsync, *detect;
 
        if (val & PORT_ENABLE)
@@ -1328,9 +1329,9 @@ DEBUGSTRING(ironlake_debug_hdmi)
                enable = "disabled";
 
        if (HAS_CPT)
-               pipe = (val & (1<<29)) ? 'B' : 'A';
+               pipe = (val & (3<<29)) >> 29;
        else
-               pipe = (val & TRANSCODER_B) ? 'B' : 'A';
+               pipe = (val & TRANSCODER_B) >> 29;
 
        switch (val & (7 << 26)) {
        case COLOR_FORMAT_8bpc:
@@ -1372,7 +1373,7 @@ DEBUGSTRING(ironlake_debug_hdmi)
                detect = "non-detected";
 
        snprintf(result, len, "%s pipe %c %s %s %s audio %s %s %s %s",
-                enable, pipe, bpc, encoding, mode, audio, vsync, hsync, detect);
+                enable, pipe + 'A', bpc, encoding, mode, audio, vsync, hsync, detect);
 }
 
 DEBUGSTRING(snb_debug_dpll_sel)
@@ -1627,6 +1628,7 @@ static struct reg_debug ironlake_debug_regs[] = {
 
        DEFINEREG2(FDI_TXA_CTL, ironlake_debug_fdi_tx_ctl),
        DEFINEREG2(FDI_TXB_CTL, ironlake_debug_fdi_tx_ctl),
+       DEFINEREG2(FDI_TXC_CTL, ironlake_debug_fdi_tx_ctl),
        DEFINEREG2(FDI_RXA_CTL, ironlake_debug_fdi_rx_ctl),
        DEFINEREG2(FDI_RXB_CTL, ironlake_debug_fdi_rx_ctl),
        DEFINEREG2(FDI_RXC_CTL, ironlake_debug_fdi_rx_ctl),