pci: gt64120: Use PCI_CONF1_ADDRESS() macro

PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/pci/pci_gt64120.c b/drivers/pci/pci_gt64120.c
index 153c65b119a437c4de22b2813e60993af0a1fd85..2c2a80eeaa0671a0ab23e8bc1dd7c8796be4a919 100644 (file)
--- a/drivers/pci/pci_gt64120.c
+++ b/drivers/pci/pci_gt64120.c
@@ -48,7 +48,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
 {
        unsigned int bus = PCI_BUS(bdf);
        unsigned int dev = PCI_DEV(bdf);
-       unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf);
+       unsigned int func = PCI_FUNC(bdf);
        u32 intr;
        u32 addr;
        u32 val;
@@ -65,10 +65,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
        /* Clear cause register bits */
        writel(~GT_INTRCAUSE_ABORT_BITS, &gt->regs->intrcause);
 
-       addr = GT_PCI0_CFGADDR_CONFIGEN_BIT;
-       addr |= bus << GT_PCI0_CFGADDR_BUSNUM_SHF;
-       addr |= devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF;
-       addr |= (where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF;
+       addr = PCI_CONF1_ADDRESS(bus, dev, func, where);
 
        /* Setup address */
        writel(addr, &gt->regs->pci0_cfgaddr);

diff --git a/include/gt64120.h b/include/gt64120.h
index 0b577f3f44b9220f8af8e93fec84d0a4667fea57..b58afe3c4afe0c200d99bf223ac72a8d13b9bb7d 100644 (file)
--- a/include/gt64120.h
+++ b/include/gt64120.h
@@ -491,18 +491,6 @@
 #define GT_INTRCAUSE_TARABORT0_BIT     GT_INTRCAUSE_TARABORT0_MSK
 
 
-#define GT_PCI0_CFGADDR_REGNUM_SHF     2
-#define GT_PCI0_CFGADDR_REGNUM_MSK     (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
-#define GT_PCI0_CFGADDR_FUNCTNUM_SHF   8
-#define GT_PCI0_CFGADDR_FUNCTNUM_MSK   (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
-#define GT_PCI0_CFGADDR_DEVNUM_SHF     11
-#define GT_PCI0_CFGADDR_DEVNUM_MSK     (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
-#define GT_PCI0_CFGADDR_BUSNUM_SHF     16
-#define GT_PCI0_CFGADDR_BUSNUM_MSK     (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_SHF   31
-#define GT_PCI0_CFGADDR_CONFIGEN_MSK   (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_BIT   GT_PCI0_CFGADDR_CONFIGEN_MSK
-
 #define GT_PCI0_CMD_MBYTESWAP_SHF      0
 #define GT_PCI0_CMD_MBYTESWAP_MSK      (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
 #define GT_PCI0_CMD_MBYTESWAP_BIT      GT_PCI0_CMD_MBYTESWAP_MSK