clk: mediatek: Consistently use GATE_MTK() macro

[ Upstream commit 4c85e20b656607897e3bb06ff565822fa4b4de95 ]

All the various MediaTek clock drivers are, in a way or another,
redefining the GATE_MTK() macro with different names: while some
are doing that by actually using GATE_MTK(), others are copying
it entirely (hence, entirely redefining it).

Change all clock drivers to always and consistently use this macro.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks
Link: https://lore.kernel.org/r/20230306140543.1813621-23-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stable-dep-of: fa8c0d01df62 ("clk: mediatek: mt7622: Properly use CLK_IS_CRITICAL flag")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/mediatek/clk-mt2701-aud.c b/drivers/clk/mediatek/clk-mt2701-aud.c
index 6ba398eb7df9158339402553585cae6d9e2a66a4..4287bd3f545ee0bbeec873120c3c8fc5d48cb85d 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-aud.c
+++ b/drivers/clk/mediatek/clk-mt2701-aud.c
@@ -15,41 +15,17 @@
 
 #include <dt-bindings/clock/mt2701-clk.h>
 
-#define GATE_AUDIO0(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio0_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO0(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_AUDIO1(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio1_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO1(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_AUDIO2(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio2_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO2(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio2_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_AUDIO3(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio3_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO3(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio3_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate_regs audio0_cg_regs = {
        .set_ofs = 0x0,

diff --git a/drivers/clk/mediatek/clk-mt2701-bdp.c b/drivers/clk/mediatek/clk-mt2701-bdp.c
index 435ed4819d5633e05e3eaef111a0487ef2efc54a..b0f0572079452088cce1d18f2f8b43ceaf1424f8 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-bdp.c
+++ b/drivers/clk/mediatek/clk-mt2701-bdp.c
@@ -24,23 +24,11 @@ static const struct mtk_gate_regs bdp1_cg_regs = {
        .sta_ofs = 0x0110,
 };
 
-#define GATE_BDP0(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &bdp0_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_BDP0(_id, _name, _parent, _shift)                 \
+       GATE_MTK(_id, _name, _parent, &bdp0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
-#define GATE_BDP1(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &bdp1_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_BDP1(_id, _name, _parent, _shift)                 \
+       GATE_MTK(_id, _name, _parent, &bdp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate bdp_clks[] = {
        GATE_BDP0(CLK_BDP_BRG_BA, "brg_baclk", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2701-eth.c b/drivers/clk/mediatek/clk-mt2701-eth.c
index edf1e2ed2b596ec3921ca593cd6b0e388777a096..601358748750e03009db6d9b4ca97366fb104e65 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-eth.c
+++ b/drivers/clk/mediatek/clk-mt2701-eth.c
@@ -16,14 +16,8 @@ static const struct mtk_gate_regs eth_cg_regs = {
        .sta_ofs = 0x0030,
 };
 
-#define GATE_ETH(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &eth_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_ETH(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &eth_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate eth_clks[] = {
        GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5),

diff --git a/drivers/clk/mediatek/clk-mt2701-g3d.c b/drivers/clk/mediatek/clk-mt2701-g3d.c
index 1458109d99d947dde4327f0b7c5f03327367e2b6..8d1fc8e3336eb22e43f3c698f69917391d4986e7 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-g3d.c
+++ b/drivers/clk/mediatek/clk-mt2701-g3d.c
@@ -16,14 +16,8 @@
 
 #include <dt-bindings/clock/mt2701-clk.h>
 
-#define GATE_G3D(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &g3d_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_G3D(_id, _name, _parent, _shift)                          \
+       GATE_MTK(_id, _name, _parent, &g3d_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate_regs g3d_cg_regs = {
        .sta_ofs = 0x0,

diff --git a/drivers/clk/mediatek/clk-mt2701-hif.c b/drivers/clk/mediatek/clk-mt2701-hif.c
index 434cbbe8c03713da888ebf90788dcaae731b09f6..edeeb033a2350a5e64ee41cd939866eab5c88aba 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-hif.c
+++ b/drivers/clk/mediatek/clk-mt2701-hif.c
@@ -16,14 +16,8 @@ static const struct mtk_gate_regs hif_cg_regs = {
        .sta_ofs = 0x0030,
 };
 
-#define GATE_HIF(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &hif_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_HIF(_id, _name, _parent, _shift)                          \
+       GATE_MTK(_id, _name, _parent, &hif_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate hif_clks[] = {
        GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21),

diff --git a/drivers/clk/mediatek/clk-mt2701-img.c b/drivers/clk/mediatek/clk-mt2701-img.c
index 7e53deb7f9905d2f17153962366d6e6fdaeffc2a..eb172473f07554bb8dcf7d588c393bff606a2700 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-img.c
+++ b/drivers/clk/mediatek/clk-mt2701-img.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs img_cg_regs = {
        .sta_ofs = 0x0000,
 };
 
-#define GATE_IMG(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &img_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IMG(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate img_clks[] = {
        GATE_IMG(CLK_IMG_SMI_COMM, "img_smi_comm", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2701-mm.c b/drivers/clk/mediatek/clk-mt2701-mm.c
index 9ea7abad99d23a8bca69ec7910a2274a84f0663d..eb069f3bc9a2b07b54fd05c63b12981cb32efff0 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-mm.c
+++ b/drivers/clk/mediatek/clk-mt2701-mm.c
@@ -24,23 +24,11 @@ static const struct mtk_gate_regs disp1_cg_regs = {
        .sta_ofs = 0x0110,
 };
 
-#define GATE_DISP0(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &disp0_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_DISP0(_id, _name, _parent, _shift)        \
+       GATE_MTK(_id, _name, _parent, &disp0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_DISP1(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &disp1_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_DISP1(_id, _name, _parent, _shift)        \
+       GATE_MTK(_id, _name, _parent, &disp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mm_clks[] = {
        GATE_DISP0(CLK_MM_SMI_COMMON, "mm_smi_comm", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2701-vdec.c b/drivers/clk/mediatek/clk-mt2701-vdec.c
index d3089da0ab62eb3f96016850af8f18eaef65da78..0f07c5d731df64911e94f8595f266b139a0917a1 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701-vdec.c
+++ b/drivers/clk/mediatek/clk-mt2701-vdec.c
@@ -24,23 +24,11 @@ static const struct mtk_gate_regs vdec1_cg_regs = {
        .sta_ofs = 0x0008,
 };
 
-#define GATE_VDEC0(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &vdec0_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VDEC0(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
-#define GATE_VDEC1(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &vdec1_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VDEC1(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate vdec_clks[] = {
        GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
index 9b442af37e6726b96ab25f73a3ca38f2aff37cd9..1c3a93143dc5e71a0a339c3fbdbc348b659d7218 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -636,14 +636,8 @@ static const struct mtk_gate_regs top_aud_cg_regs = {
        .sta_ofs = 0x012C,
 };
 
-#define GATE_TOP_AUD(_id, _name, _parent, _shift) {    \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top_aud_cg_regs,               \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_TOP_AUD(_id, _name, _parent, _shift)                      \
+       GATE_MTK(_id, _name, _parent, &top_aud_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate top_clks[] = {
        GATE_TOP_AUD(CLK_TOP_AUD_48K_TIMING, "a1sys_hp_ck", "aud_mux1_div",
@@ -701,14 +695,8 @@ static const struct mtk_gate_regs infra_cg_regs = {
        .sta_ofs = 0x0048,
 };
 
-#define GATE_ICG(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &infra_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_ICG(_id, _name, _parent, _shift)                          \
+       GATE_MTK(_id, _name, _parent, &infra_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate infra_clks[] = {
        GATE_ICG(CLK_INFRA_DBG, "dbgclk", "axi_sel", 0),
@@ -822,23 +810,11 @@ static const struct mtk_gate_regs peri1_cg_regs = {
        .sta_ofs = 0x001c,
 };
 
-#define GATE_PERI0(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &peri0_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_PERI0(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_PERI1(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &peri1_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_PERI1(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate peri_clks[] = {
        GATE_PERI0(CLK_PERI_USB0_MCU, "usb0_mcu_ck", "axi_sel", 31),

diff --git a/drivers/clk/mediatek/clk-mt2712-bdp.c b/drivers/clk/mediatek/clk-mt2712-bdp.c
index 684d03e9f6de17e4d70db7d3788152b489dc35bc..5e668651dd90191193b10f9392b28dcce85be03d 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712-bdp.c
+++ b/drivers/clk/mediatek/clk-mt2712-bdp.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs bdp_cg_regs = {
        .sta_ofs = 0x100,
 };
 
-#define GATE_BDP(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &bdp_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_BDP(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &bdp_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate bdp_clks[] = {
        GATE_BDP(CLK_BDP_BRIDGE_B, "bdp_bridge_b", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2712-img.c b/drivers/clk/mediatek/clk-mt2712-img.c
index 335049cdc856c6f2a97e29d7fe12b708c577264a..3ffa51384e6b2744faade1e17623daae8716d1bb 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712-img.c
+++ b/drivers/clk/mediatek/clk-mt2712-img.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs img_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_IMG(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &img_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_IMG(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate img_clks[] = {
        GATE_IMG(CLK_IMG_SMI_LARB2, "img_smi_larb2", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2712-jpgdec.c b/drivers/clk/mediatek/clk-mt2712-jpgdec.c
index 07ba7c5e80aff3a6b39887c416425559ca78a15a..8c768d5ce24d5228533af5c28a4e226076589c02 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712-jpgdec.c
+++ b/drivers/clk/mediatek/clk-mt2712-jpgdec.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs jpgdec_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_JPGDEC(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &jpgdec_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_JPGDEC(_id, _name, _parent, _shift)                       \
+       GATE_MTK(_id, _name, _parent, &jpgdec_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate jpgdec_clks[] = {
        GATE_JPGDEC(CLK_JPGDEC_JPGDEC1, "jpgdec_jpgdec1", "jpgdec_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2712-mfg.c b/drivers/clk/mediatek/clk-mt2712-mfg.c
index 42f8cf3ecf4cb2e529fadc68cb19eacd49d1beb9..8949315c2dd2046154f9d481a9946e0529c4225c 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712-mfg.c
+++ b/drivers/clk/mediatek/clk-mt2712-mfg.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs mfg_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_MFG(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mfg_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_MFG(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mfg_clks[] = {
        GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2712-mm.c b/drivers/clk/mediatek/clk-mt2712-mm.c
index 7d44b09b8a0a793abe14818e52647ba16d0c8239..ad6daa8f28a83c4e67f03b2ab41dba25201fc852 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712-mm.c
+++ b/drivers/clk/mediatek/clk-mt2712-mm.c
@@ -30,32 +30,14 @@ static const struct mtk_gate_regs mm2_cg_regs = {
        .sta_ofs = 0x220,
 };
 
-#define GATE_MM0(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mm0_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
-
-#define GATE_MM1(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mm1_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
-
-#define GATE_MM2(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mm2_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_MM0(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+
+#define GATE_MM1(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+
+#define GATE_MM2(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mm_clks[] = {
        /* MM0 */

diff --git a/drivers/clk/mediatek/clk-mt2712-vdec.c b/drivers/clk/mediatek/clk-mt2712-vdec.c
index 6296ed5c5b5559cdb48d552242626739df044c8b..572290dd43c87aaccad730f97368cb2d6b95bbad 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712-vdec.c
+++ b/drivers/clk/mediatek/clk-mt2712-vdec.c
@@ -24,23 +24,11 @@ static const struct mtk_gate_regs vdec1_cg_regs = {
        .sta_ofs = 0x8,
 };
 
-#define GATE_VDEC0(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &vdec0_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VDEC0(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
-#define GATE_VDEC1(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &vdec1_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VDEC1(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate vdec_clks[] = {
        /* VDEC0 */

diff --git a/drivers/clk/mediatek/clk-mt2712-venc.c b/drivers/clk/mediatek/clk-mt2712-venc.c
index b9bfc35de629c6a5a64873a8884ec35d6a3bb890..9588eb03016ebe60fd8df21ef079406fb0282b82 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712-venc.c
+++ b/drivers/clk/mediatek/clk-mt2712-venc.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs venc_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_VENC(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &venc_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VENC(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate venc_clks[] = {
        GATE_VENC(CLK_VENC_SMI_COMMON_CON, "venc_smi", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt2712.c b/drivers/clk/mediatek/clk-mt2712.c
index 7309b5813da96b409fd47a239a710c6514f191d6..d6c2cc183b1a10317152c01401d2160d16b7fe83 100644 (file)
--- a/drivers/clk/mediatek/clk-mt2712.c
+++ b/drivers/clk/mediatek/clk-mt2712.c
@@ -958,23 +958,11 @@ static const struct mtk_gate_regs top1_cg_regs = {
        .sta_ofs = 0x424,
 };
 
-#define GATE_TOP0(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top0_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_TOP0(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_TOP1(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top1_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_TOP1(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate top_clks[] = {
        /* TOP0 */
@@ -998,14 +986,8 @@ static const struct mtk_gate_regs infra_cg_regs = {
        .sta_ofs = 0x48,
 };
 
-#define GATE_INFRA(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &infra_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_INFRA(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &infra_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate infra_clks[] = {
        GATE_INFRA(CLK_INFRA_DBGCLK, "infra_dbgclk", "axi_sel", 0),
@@ -1035,32 +1017,14 @@ static const struct mtk_gate_regs peri2_cg_regs = {
        .sta_ofs = 0x42c,
 };
 
-#define GATE_PERI0(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &peri0_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_PERI0(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_PERI1(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &peri1_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_PERI1(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_PERI2(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &peri2_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_PERI2(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri2_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate peri_clks[] = {
        /* PERI0 */

diff --git a/drivers/clk/mediatek/clk-mt6765-audio.c b/drivers/clk/mediatek/clk-mt6765-audio.c
index 0aa6c0d352ca56720b2f76407df16913a40478e1..5682e0302eee21e43cc9bb6925d9d6b00dd6661e 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6765-audio.c
+++ b/drivers/clk/mediatek/clk-mt6765-audio.c
@@ -24,23 +24,11 @@ static const struct mtk_gate_regs audio1_cg_regs = {
        .sta_ofs = 0x4,
 };
 
-#define GATE_AUDIO0(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio0_cg_regs,                \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO0(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_AUDIO1(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio1_cg_regs,                \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO1(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate audio_clks[] = {
        /* AUDIO0 */

diff --git a/drivers/clk/mediatek/clk-mt6765-cam.c b/drivers/clk/mediatek/clk-mt6765-cam.c
index 25f2bef38126e376add3a16e83a64ce5178670bb..6e7d192c19cb0c42d3e887324c1525291c55afbe 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6765-cam.c
+++ b/drivers/clk/mediatek/clk-mt6765-cam.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs cam_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_CAM(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &cam_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_CAM(_id, _name, _parent, _shift)                          \
+       GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate cam_clks[] = {
        GATE_CAM(CLK_CAM_LARB3, "cam_larb3", "mm_ck", 0),

diff --git a/drivers/clk/mediatek/clk-mt6765-img.c b/drivers/clk/mediatek/clk-mt6765-img.c
index a62303ef4f41df8b0976c4aef9e8f4de9bd96e9e..cfbc907988afffbefdfd3e26d7c11988b351cecf 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6765-img.c
+++ b/drivers/clk/mediatek/clk-mt6765-img.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs img_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_IMG(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &img_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IMG(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate img_clks[] = {
        GATE_IMG(CLK_IMG_LARB2, "img_larb2", "mm_ck", 0),

diff --git a/drivers/clk/mediatek/clk-mt6765-mipi0a.c b/drivers/clk/mediatek/clk-mt6765-mipi0a.c
index 25c829fc386618b05b74063a6dd7d74d33fead31..f2b9dc80848016d40531bb17bf9bfad7c28e5162 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6765-mipi0a.c
+++ b/drivers/clk/mediatek/clk-mt6765-mipi0a.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs mipi0a_cg_regs = {
        .sta_ofs = 0x80,
 };
 
-#define GATE_MIPI0A(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mipi0a_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_MIPI0A(_id, _name, _parent, _shift)                       \
+       GATE_MTK(_id, _name, _parent, &mipi0a_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate mipi0a_clks[] = {
        GATE_MIPI0A(CLK_MIPI0A_CSR_CSI_EN_0A,

diff --git a/drivers/clk/mediatek/clk-mt6765-mm.c b/drivers/clk/mediatek/clk-mt6765-mm.c
index bda774668a3616a389a3cb9fd337fa25c30d33b4..a4570c9dbefa503c1af8364e944f068b0ac3dd22 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6765-mm.c
+++ b/drivers/clk/mediatek/clk-mt6765-mm.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs mm_cg_regs = {
        .sta_ofs = 0x100,
 };
 
-#define GATE_MM(_id, _name, _parent, _shift) {         \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mm_cg_regs,                    \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_MM(_id, _name, _parent, _shift)   \
+       GATE_MTK(_id, _name, _parent, &mm_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mm_clks[] = {
        /* MM */

diff --git a/drivers/clk/mediatek/clk-mt6765-vcodec.c b/drivers/clk/mediatek/clk-mt6765-vcodec.c
index 2bc1fbde87da90a769e5d00ba727a1c37f253983..75d72b9b4032cb2d7d676145afbb665b73d4714e 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6765-vcodec.c
+++ b/drivers/clk/mediatek/clk-mt6765-vcodec.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs venc_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_VENC(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &venc_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VENC(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate venc_clks[] = {
        GATE_VENC(CLK_VENC_SET0_LARB, "venc_set0_larb", "mm_ck", 0),

diff --git a/drivers/clk/mediatek/clk-mt6765.c b/drivers/clk/mediatek/clk-mt6765.c
index e9b9e6729733528be28d00af281d1e4b897dbee6..665981fc411f5e7afd0f7c2800bee055e9066b4e 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6765.c
+++ b/drivers/clk/mediatek/clk-mt6765.c
@@ -483,32 +483,14 @@ static const struct mtk_gate_regs top2_cg_regs = {
        .sta_ofs = 0x320,
 };
 
-#define GATE_TOP0(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top0_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_TOP0(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_TOP1(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top1_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_TOP1(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
-#define GATE_TOP2(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top2_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_TOP2(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate top_clks[] = {
        /* TOP0 */
@@ -559,41 +541,17 @@ static const struct mtk_gate_regs ifr5_cg_regs = {
        .sta_ofs = 0xc8,
 };
 
-#define GATE_IFR2(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &ifr2_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IFR2(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &ifr2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_IFR3(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &ifr3_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IFR3(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &ifr3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_IFR4(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &ifr4_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IFR4(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &ifr4_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_IFR5(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &ifr5_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IFR5(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &ifr5_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate ifr_clks[] = {
        /* INFRA_TOPAXI */
@@ -674,14 +632,8 @@ static const struct mtk_gate_regs apmixed_cg_regs = {
        .sta_ofs = 0x14,
 };
 
-#define GATE_APMIXED(_id, _name, _parent, _shift) {    \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &apmixed_cg_regs,               \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv,         \
-       }
+#define GATE_APMIXED(_id, _name, _parent, _shift)                      \
+       GATE_MTK(_id, _name, _parent, &apmixed_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate apmixed_clks[] = {
        /* AUDIO0 */

diff --git a/drivers/clk/mediatek/clk-mt6797-img.c b/drivers/clk/mediatek/clk-mt6797-img.c
index 7c6a53fbb8be68211b8e23f0ad02b429e62d22fc..06441393478f67b8cfaf0ccdfe1a57a6c2e8ca30 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6797-img.c
+++ b/drivers/clk/mediatek/clk-mt6797-img.c
@@ -16,14 +16,8 @@ static const struct mtk_gate_regs img_cg_regs = {
        .sta_ofs = 0x0000,
 };
 
-#define GATE_IMG(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &img_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IMG(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate img_clks[] = {
        GATE_IMG(CLK_IMG_FDVT, "img_fdvt", "mm_sel", 11),

diff --git a/drivers/clk/mediatek/clk-mt6797-mm.c b/drivers/clk/mediatek/clk-mt6797-mm.c
index 0846011fc8943ec00c27fb334ddf7ce08bd32606..99a63f46642fa11b71e868fa3ef9b1dc53e3773d 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6797-mm.c
+++ b/drivers/clk/mediatek/clk-mt6797-mm.c
@@ -23,23 +23,11 @@ static const struct mtk_gate_regs mm1_cg_regs = {
        .sta_ofs = 0x0110,
 };
 
-#define GATE_MM0(_id, _name, _parent, _shift) {                        \
-       .id = _id,                                      \
-       .name = _name,                                  \
-       .parent_name = _parent,                         \
-       .regs = &mm0_cg_regs,                           \
-       .shift = _shift,                                \
-       .ops = &mtk_clk_gate_ops_setclr,                \
-}
+#define GATE_MM0(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_MM1(_id, _name, _parent, _shift) {                        \
-       .id = _id,                                      \
-       .name = _name,                                  \
-       .parent_name = _parent,                         \
-       .regs = &mm1_cg_regs,                           \
-       .shift = _shift,                                \
-       .ops = &mtk_clk_gate_ops_setclr,                \
-}
+#define GATE_MM1(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mm_clks[] = {
        GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt6797-vdec.c b/drivers/clk/mediatek/clk-mt6797-vdec.c
index 6120fccc859f1b9fa9a7458bf43588878e3cc3cb..8622ddd87a5bb11d30fc389282d6de491ade7d85 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6797-vdec.c
+++ b/drivers/clk/mediatek/clk-mt6797-vdec.c
@@ -24,23 +24,11 @@ static const struct mtk_gate_regs vdec1_cg_regs = {
        .sta_ofs = 0x0008,
 };
 
-#define GATE_VDEC0(_id, _name, _parent, _shift) {              \
-       .id = _id,                                      \
-       .name = _name,                                  \
-       .parent_name = _parent,                         \
-       .regs = &vdec0_cg_regs,                         \
-       .shift = _shift,                                \
-       .ops = &mtk_clk_gate_ops_setclr_inv,            \
-}
+#define GATE_VDEC0(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
-#define GATE_VDEC1(_id, _name, _parent, _shift) {              \
-       .id = _id,                                      \
-       .name = _name,                                  \
-       .parent_name = _parent,                         \
-       .regs = &vdec1_cg_regs,                         \
-       .shift = _shift,                                \
-       .ops = &mtk_clk_gate_ops_setclr_inv,            \
-}
+#define GATE_VDEC1(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate vdec_clks[] = {
        GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "vdec_sel", 8),

diff --git a/drivers/clk/mediatek/clk-mt6797-venc.c b/drivers/clk/mediatek/clk-mt6797-venc.c
index 834d3834d2bbcccbf616bd20a5984ae0213a5d42..928d611a476e40825cb92e58af451a29ed2d56f6 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6797-venc.c
+++ b/drivers/clk/mediatek/clk-mt6797-venc.c
@@ -18,14 +18,8 @@ static const struct mtk_gate_regs venc_cg_regs = {
        .sta_ofs = 0x0000,
 };
 
-#define GATE_VENC(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &venc_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VENC(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate venc_clks[] = {
        GATE_VENC(CLK_VENC_0, "venc_0", "mm_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt6797.c b/drivers/clk/mediatek/clk-mt6797.c
index b89f325a4b9b8476074f4fe96786a4b8aa0567be..78339cb35beb029abca2251a0c39d728da722741 100644 (file)
--- a/drivers/clk/mediatek/clk-mt6797.c
+++ b/drivers/clk/mediatek/clk-mt6797.c
@@ -420,40 +420,22 @@ static const struct mtk_gate_regs infra2_cg_regs = {
        .sta_ofs = 0x00b0,
 };
 
-#define GATE_ICG0(_id, _name, _parent, _shift) {               \
-       .id = _id,                                              \
-       .name = _name,                                          \
-       .parent_name = _parent,                                 \
-       .regs = &infra0_cg_regs,                                \
-       .shift = _shift,                                        \
-       .ops = &mtk_clk_gate_ops_setclr,                        \
-}
+#define GATE_ICG0(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_ICG1(_id, _name, _parent, _shift)                 \
-       GATE_ICG1_FLAGS(_id, _name, _parent, _shift, 0)
+#define GATE_ICG1(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) { \
-       .id = _id,                                              \
-       .name = _name,                                          \
-       .parent_name = _parent,                                 \
-       .regs = &infra1_cg_regs,                                \
-       .shift = _shift,                                        \
-       .ops = &mtk_clk_gate_ops_setclr,                        \
-       .flags = _flags,                                        \
-}
+#define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags)           \
+       GATE_MTK_FLAGS(_id, _name, _parent, &infra1_cg_regs, _shift,    \
+                      &mtk_clk_gate_ops_setclr, _flags)
 
-#define GATE_ICG2(_id, _name, _parent, _shift)                 \
-       GATE_ICG2_FLAGS(_id, _name, _parent, _shift, 0)
+#define GATE_ICG2(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) { \
-       .id = _id,                                              \
-       .name = _name,                                          \
-       .parent_name = _parent,                                 \
-       .regs = &infra2_cg_regs,                                \
-       .shift = _shift,                                        \
-       .ops = &mtk_clk_gate_ops_setclr,                        \
-       .flags = _flags,                                        \
-}
+#define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags)           \
+       GATE_MTK_FLAGS(_id, _name, _parent, &infra2_cg_regs, _shift,    \
+                      &mtk_clk_gate_ops_setclr, _flags)
 
 /*
  * Clock gates dramc and dramc_b are needed by the DRAM controller.

diff --git a/drivers/clk/mediatek/clk-mt7622-aud.c b/drivers/clk/mediatek/clk-mt7622-aud.c
index 9f2e5aa7b5d9baae18f37d4326b862df42285b34..b17731fa114456625090d0d7fd42d4c8587ba620 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7622-aud.c
+++ b/drivers/clk/mediatek/clk-mt7622-aud.c
@@ -16,41 +16,17 @@
 
 #include <dt-bindings/clock/mt7622-clk.h>
 
-#define GATE_AUDIO0(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio0_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO0(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_AUDIO1(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio1_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO1(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_AUDIO2(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio2_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO2(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio2_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_AUDIO3(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &audio3_cg_regs,                        \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_AUDIO3(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &audio3_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate_regs audio0_cg_regs = {
        .set_ofs = 0x0,

diff --git a/drivers/clk/mediatek/clk-mt7622-eth.c b/drivers/clk/mediatek/clk-mt7622-eth.c
index 43de0477d5d998a3704341492e508d3e3ddfe916..a60190e83418694cb4721b8428c910cf7b4a8538 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7622-eth.c
+++ b/drivers/clk/mediatek/clk-mt7622-eth.c
@@ -16,14 +16,8 @@
 
 #include <dt-bindings/clock/mt7622-clk.h>
 
-#define GATE_ETH(_id, _name, _parent, _shift) {        \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &eth_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_ETH(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &eth_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate_regs eth_cg_regs = {
        .set_ofs = 0x30,
@@ -45,14 +39,8 @@ static const struct mtk_gate_regs sgmii_cg_regs = {
        .sta_ofs = 0xE4,
 };
 
-#define GATE_SGMII(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &sgmii_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_SGMII(_id, _name, _parent, _shift)                        \
+       GATE_MTK(_id, _name, _parent, &sgmii_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate sgmii_clks[] = {
        GATE_SGMII(CLK_SGMII_TX250M_EN, "sgmii_tx250m_en",

diff --git a/drivers/clk/mediatek/clk-mt7622-hif.c b/drivers/clk/mediatek/clk-mt7622-hif.c
index 67e96231dd25b865819e31e4c281d1f7e4f78283..55baa6d06a205b0c2ad91573798b245b55dd3c4c 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7622-hif.c
+++ b/drivers/clk/mediatek/clk-mt7622-hif.c
@@ -16,23 +16,11 @@
 
 #include <dt-bindings/clock/mt7622-clk.h>
 
-#define GATE_PCIE(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &pcie_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_PCIE(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &pcie_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
-#define GATE_SSUSB(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &ssusb_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_SSUSB(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &ssusb_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate_regs pcie_cg_regs = {
        .set_ofs = 0x30,

diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 3b55f8641fae0cd5b2c54fdea876445819a97db7..41b3d032bf91c99187f40832d4cbc7f7c7ab827e 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -50,59 +50,24 @@
                 _pd_reg, _pd_shift, _tuner_reg, _pcw_reg, _pcw_shift,  \
                 NULL, "clkxtal")
 
-#define GATE_APMIXED(_id, _name, _parent, _shift) {                    \
-               .id = _id,                                              \
-               .name = _name,                                          \
-               .parent_name = _parent,                                 \
-               .regs = &apmixed_cg_regs,                               \
-               .shift = _shift,                                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv,                 \
-       }
+#define GATE_APMIXED(_id, _name, _parent, _shift)                      \
+       GATE_MTK(_id, _name, _parent, &apmixed_cg_regs, _shift,         \
+                &mtk_clk_gate_ops_no_setclr_inv)
 
-#define GATE_INFRA(_id, _name, _parent, _shift) {                      \
-               .id = _id,                                              \
-               .name = _name,                                          \
-               .parent_name = _parent,                                 \
-               .regs = &infra_cg_regs,                                 \
-               .shift = _shift,                                        \
-               .ops = &mtk_clk_gate_ops_setclr,                        \
-       }
+#define GATE_INFRA(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &infra_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_TOP0(_id, _name, _parent, _shift) {                       \
-               .id = _id,                                              \
-               .name = _name,                                          \
-               .parent_name = _parent,                                 \
-               .regs = &top0_cg_regs,                                  \
-               .shift = _shift,                                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,                     \
-       }
+#define GATE_TOP0(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_TOP1(_id, _name, _parent, _shift) {                       \
-               .id = _id,                                              \
-               .name = _name,                                          \
-               .parent_name = _parent,                                 \
-               .regs = &top1_cg_regs,                                  \
-               .shift = _shift,                                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,                     \
-       }
+#define GATE_TOP1(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
-#define GATE_PERI0(_id, _name, _parent, _shift) {                      \
-               .id = _id,                                              \
-               .name = _name,                                          \
-               .parent_name = _parent,                                 \
-               .regs = &peri0_cg_regs,                                 \
-               .shift = _shift,                                        \
-               .ops = &mtk_clk_gate_ops_setclr,                        \
-       }
+#define GATE_PERI0(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_PERI1(_id, _name, _parent, _shift) {                      \
-               .id = _id,                                              \
-               .name = _name,                                          \
-               .parent_name = _parent,                                 \
-               .regs = &peri1_cg_regs,                                 \
-               .shift = _shift,                                        \
-               .ops = &mtk_clk_gate_ops_setclr,                        \
-       }
+#define GATE_PERI1(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static DEFINE_SPINLOCK(mt7622_clk_lock);
 

diff --git a/drivers/clk/mediatek/clk-mt7629-eth.c b/drivers/clk/mediatek/clk-mt7629-eth.c
index 282dd6559465424b23ecead143ca1066f736e220..b0c8fa3b8bbec14989171eb18fd13c0aabf195ae 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7629-eth.c
+++ b/drivers/clk/mediatek/clk-mt7629-eth.c
@@ -16,14 +16,8 @@
 
 #include <dt-bindings/clock/mt7629-clk.h>
 
-#define GATE_ETH(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &eth_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_ETH(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &eth_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate_regs eth_cg_regs = {
        .set_ofs = 0x30,
@@ -45,14 +39,8 @@ static const struct mtk_gate_regs sgmii_cg_regs = {
        .sta_ofs = 0xE4,
 };
 
-#define GATE_SGMII(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &sgmii_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_SGMII(_id, _name, _parent, _shift)                        \
+       GATE_MTK(_id, _name, _parent, &sgmii_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate sgmii_clks[2][4] = {
        {

diff --git a/drivers/clk/mediatek/clk-mt7629-hif.c b/drivers/clk/mediatek/clk-mt7629-hif.c
index 0c8b9e1397890a334d681ba108aa0089a8e097d6..3628811a2f57f0cccc1bb24506ac335013328ae7 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7629-hif.c
+++ b/drivers/clk/mediatek/clk-mt7629-hif.c
@@ -16,23 +16,11 @@
 
 #include <dt-bindings/clock/mt7629-clk.h>
 
-#define GATE_PCIE(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &pcie_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_PCIE(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &pcie_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
-#define GATE_SSUSB(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &ssusb_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_SSUSB(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &ssusb_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate_regs pcie_cg_regs = {
        .set_ofs = 0x30,

diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index e4a08c811adc279b8b3972e04e162990eec3de67..0bc88b7d171b5d2a9ae1a281c4182b3c28806077 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -50,41 +50,17 @@
                _pd_reg, _pd_shift, _tuner_reg, _pcw_reg, _pcw_shift,   \
                NULL, "clk20m")
 
-#define GATE_APMIXED(_id, _name, _parent, _shift) {    \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &apmixed_cg_regs,               \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
-       }
+#define GATE_APMIXED(_id, _name, _parent, _shift)                      \
+       GATE_MTK(_id, _name, _parent, &apmixed_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
-#define GATE_INFRA(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &infra_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_INFRA(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &infra_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_PERI0(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &peri0_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_PERI0(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_PERI1(_id, _name, _parent, _shift) {      \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &peri1_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_PERI1(_id, _name, _parent, _shift)                                \
+       GATE_MTK(_id, _name, _parent, &peri1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static DEFINE_SPINLOCK(mt7629_clk_lock);
 

diff --git a/drivers/clk/mediatek/clk-mt7986-eth.c b/drivers/clk/mediatek/clk-mt7986-eth.c
index 7868c0728e9620c02ef8b8307e54079e7f82b6e6..c21e1d672384aa72e9a5d4c228ebb9fe739513dc 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7986-eth.c
+++ b/drivers/clk/mediatek/clk-mt7986-eth.c
@@ -22,12 +22,8 @@ static const struct mtk_gate_regs sgmii0_cg_regs = {
        .sta_ofs = 0xe4,
 };
 
-#define GATE_SGMII0(_id, _name, _parent, _shift)                               \
-       {                                                                      \
-               .id = _id, .name = _name, .parent_name = _parent,              \
-               .regs = &sgmii0_cg_regs, .shift = _shift,                      \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv,                        \
-       }
+#define GATE_SGMII0(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &sgmii0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate sgmii0_clks[] __initconst = {
        GATE_SGMII0(CLK_SGMII0_TX250M_EN, "sgmii0_tx250m_en", "top_xtal", 2),
@@ -42,12 +38,8 @@ static const struct mtk_gate_regs sgmii1_cg_regs = {
        .sta_ofs = 0xe4,
 };
 
-#define GATE_SGMII1(_id, _name, _parent, _shift)                               \
-       {                                                                      \
-               .id = _id, .name = _name, .parent_name = _parent,              \
-               .regs = &sgmii1_cg_regs, .shift = _shift,                      \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv,                        \
-       }
+#define GATE_SGMII1(_id, _name, _parent, _shift)               \
+       GATE_MTK(_id, _name, _parent, &sgmii1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate sgmii1_clks[] __initconst = {
        GATE_SGMII1(CLK_SGMII1_TX250M_EN, "sgmii1_tx250m_en", "top_xtal", 2),
@@ -62,12 +54,8 @@ static const struct mtk_gate_regs eth_cg_regs = {
        .sta_ofs = 0x30,
 };
 
-#define GATE_ETH(_id, _name, _parent, _shift)                                  \
-       {                                                                      \
-               .id = _id, .name = _name, .parent_name = _parent,              \
-               .regs = &eth_cg_regs, .shift = _shift,                         \
-               .ops = &mtk_clk_gate_ops_no_setclr_inv,                        \
-       }
+#define GATE_ETH(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &eth_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 static const struct mtk_gate eth_clks[] __initconst = {
        GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "netsys_2x_sel", 6),

diff --git a/drivers/clk/mediatek/clk-mt7986-infracfg.c b/drivers/clk/mediatek/clk-mt7986-infracfg.c
index 49666047bf0ed53f5340762131c4b5a5b6746425..74e68a7197301f24dddc07ae7b4a069de5617a93 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7986-infracfg.c
+++ b/drivers/clk/mediatek/clk-mt7986-infracfg.c
@@ -87,26 +87,14 @@ static const struct mtk_gate_regs infra2_cg_regs = {
        .sta_ofs = 0x68,
 };
 
-#define GATE_INFRA0(_id, _name, _parent, _shift)                               \
-       {                                                                      \
-               .id = _id, .name = _name, .parent_name = _parent,              \
-               .regs = &infra0_cg_regs, .shift = _shift,                      \
-               .ops = &mtk_clk_gate_ops_setclr,                               \
-       }
+#define GATE_INFRA0(_id, _name, _parent, _shift)                       \
+       GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_INFRA1(_id, _name, _parent, _shift)                               \
-       {                                                                      \
-               .id = _id, .name = _name, .parent_name = _parent,              \
-               .regs = &infra1_cg_regs, .shift = _shift,                      \
-               .ops = &mtk_clk_gate_ops_setclr,                               \
-       }
+#define GATE_INFRA1(_id, _name, _parent, _shift)                       \
+       GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_INFRA2(_id, _name, _parent, _shift)                               \
-       {                                                                      \
-               .id = _id, .name = _name, .parent_name = _parent,              \
-               .regs = &infra2_cg_regs, .shift = _shift,                      \
-               .ops = &mtk_clk_gate_ops_setclr,                               \
-       }
+#define GATE_INFRA2(_id, _name, _parent, _shift)                       \
+       GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate infra_clks[] = {
        /* INFRA0 */

diff --git a/drivers/clk/mediatek/clk-mt8135.c b/drivers/clk/mediatek/clk-mt8135.c
index b68888a034c40924e32be9a713dbc7fb7e323fe9..1cbe0958d9cd090f54d6ca7e4677888fe9847b79 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8135.c
+++ b/drivers/clk/mediatek/clk-mt8135.c
@@ -401,14 +401,8 @@ static const struct mtk_gate_regs infra_cg_regs = {
        .sta_ofs = 0x0048,
 };
 
-#define GATE_ICG(_id, _name, _parent, _shift) {        \
-               .id = _id,                                      \
-               .name = _name,                                  \
-               .parent_name = _parent,                         \
-               .regs = &infra_cg_regs,                         \
-               .shift = _shift,                                \
-               .ops = &mtk_clk_gate_ops_setclr,                \
-       }
+#define GATE_ICG(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &infra_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate infra_clks[] __initconst = {
        GATE_ICG(CLK_INFRA_PMIC_WRAP, "pmic_wrap_ck", "axi_sel", 23),
@@ -438,23 +432,11 @@ static const struct mtk_gate_regs peri1_cg_regs = {
        .sta_ofs = 0x001c,
 };
 
-#define GATE_PERI0(_id, _name, _parent, _shift) {      \
-               .id = _id,                                      \
-               .name = _name,                                  \
-               .parent_name = _parent,                         \
-               .regs = &peri0_cg_regs,                         \
-               .shift = _shift,                                \
-               .ops = &mtk_clk_gate_ops_setclr,                \
-       }
+#define GATE_PERI0(_id, _name, _parent, _shift)        \
+       GATE_MTK(_id, _name, _parent, &peri0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_PERI1(_id, _name, _parent, _shift) {      \
-               .id = _id,                                      \
-               .name = _name,                                  \
-               .parent_name = _parent,                         \
-               .regs = &peri1_cg_regs,                         \
-               .shift = _shift,                                \
-               .ops = &mtk_clk_gate_ops_setclr,                \
-       }
+#define GATE_PERI1(_id, _name, _parent, _shift)        \
+       GATE_MTK(_id, _name, _parent, &peri1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate peri_gates[] __initconst = {
        /* PERI0 */

diff --git a/drivers/clk/mediatek/clk-mt8167-aud.c b/drivers/clk/mediatek/clk-mt8167-aud.c
index ce1ae8d243c33dd3c54364ac90f5555e301a507c..b5ac196cd9454f1a627dd2aac9009b400802e18e 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8167-aud.c
+++ b/drivers/clk/mediatek/clk-mt8167-aud.c
@@ -23,14 +23,9 @@ static const struct mtk_gate_regs aud_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_AUD(_id, _name, _parent, _shift) {        \
-               .id = _id,                      \
-               .name = _name,                  \
-               .parent_name = _parent,         \
-               .regs = &aud_cg_regs,           \
-               .shift = _shift,                \
-               .ops = &mtk_clk_gate_ops_no_setclr,             \
-       }
+#define GATE_AUD(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &aud_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
+
 
 static const struct mtk_gate aud_clks[] __initconst = {
        GATE_AUD(CLK_AUD_AFE, "aud_afe", "clk26m_ck", 2),

diff --git a/drivers/clk/mediatek/clk-mt8167-img.c b/drivers/clk/mediatek/clk-mt8167-img.c
index e359e563d2b79d80cb37b7ec4612b09b20aa51f6..4e7c0772b4f99a1ba58ad954d643da8a3e88a292 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8167-img.c
+++ b/drivers/clk/mediatek/clk-mt8167-img.c
@@ -23,14 +23,8 @@ static const struct mtk_gate_regs img_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_IMG(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &img_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_IMG(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate img_clks[] __initconst = {
        GATE_IMG(CLK_IMG_LARB1_SMI, "img_larb1_smi", "smi_mm", 0),

diff --git a/drivers/clk/mediatek/clk-mt8167-mfgcfg.c b/drivers/clk/mediatek/clk-mt8167-mfgcfg.c
index 4fd82fe87d6e51ed5bad6418247a0ecc60d85342..192714498b2ec1dc4852629c5857c253929f8d14 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8167-mfgcfg.c
+++ b/drivers/clk/mediatek/clk-mt8167-mfgcfg.c
@@ -23,14 +23,8 @@ static const struct mtk_gate_regs mfg_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_MFG(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mfg_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_MFG(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mfg_clks[] __initconst = {
        GATE_MFG(CLK_MFG_BAXI, "mfg_baxi", "ahb_infra_sel", 0),

diff --git a/drivers/clk/mediatek/clk-mt8167-mm.c b/drivers/clk/mediatek/clk-mt8167-mm.c
index 73910060577f6c55f9f803c950d970117ec9f2af..a94961b7b8cc63be48467e242691cd6fd6a8a2cb 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8167-mm.c
+++ b/drivers/clk/mediatek/clk-mt8167-mm.c
@@ -29,23 +29,11 @@ static const struct mtk_gate_regs mm1_cg_regs = {
        .sta_ofs = 0x110,
 };
 
-#define GATE_MM0(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mm0_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
-
-#define GATE_MM1(_id, _name, _parent, _shift) {                \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &mm1_cg_regs,                   \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_MM0(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+
+#define GATE_MM1(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mm_clks[] = {
        /* MM0 */

diff --git a/drivers/clk/mediatek/clk-mt8167-vdec.c b/drivers/clk/mediatek/clk-mt8167-vdec.c
index ee4fffb6859dabd3d4146943e5d4f45d1fbefc43..38f0ba357d5994c1bfeaea0e74d49145208ef40d 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8167-vdec.c
+++ b/drivers/clk/mediatek/clk-mt8167-vdec.c
@@ -29,23 +29,11 @@ static const struct mtk_gate_regs vdec1_cg_regs = {
        .sta_ofs = 0x8,
 };
 
-#define GATE_VDEC0_I(_id, _name, _parent, _shift) {    \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &vdec0_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VDEC0_I(_id, _name, _parent, _shift)                      \
+       GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
-#define GATE_VDEC1_I(_id, _name, _parent, _shift) {    \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &vdec1_cg_regs,                 \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_VDEC1_I(_id, _name, _parent, _shift)                      \
+       GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
 static const struct mtk_gate vdec_clks[] __initconst = {
        /* VDEC0 */

diff --git a/drivers/clk/mediatek/clk-mt8173-mm.c b/drivers/clk/mediatek/clk-mt8173-mm.c
index 8abf42c2030c67b62b449cb5cb6ebd5dc40379f9..5826eabdc9c77e88120d80d83b9eae1a9f8bc548 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8173-mm.c
+++ b/drivers/clk/mediatek/clk-mt8173-mm.c
@@ -25,23 +25,11 @@ static const struct mtk_gate_regs mm1_cg_regs = {
        .sta_ofs = 0x0110,
 };
 
-#define GATE_MM0(_id, _name, _parent, _shift) {                        \
-               .id = _id,                                      \
-               .name = _name,                                  \
-               .parent_name = _parent,                         \
-               .regs = &mm0_cg_regs,                           \
-               .shift = _shift,                                \
-               .ops = &mtk_clk_gate_ops_setclr,                \
-       }
-
-#define GATE_MM1(_id, _name, _parent, _shift) {                        \
-               .id = _id,                                      \
-               .name = _name,                                  \
-               .parent_name = _parent,                         \
-               .regs = &mm1_cg_regs,                           \
-               .shift = _shift,                                \
-               .ops = &mtk_clk_gate_ops_setclr,                \
-       }
+#define GATE_MM0(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+
+#define GATE_MM1(_id, _name, _parent, _shift)  \
+       GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate mt8173_mm_clks[] = {
        /* MM0 */

diff --git a/drivers/clk/mediatek/clk-mt8516-aud.c b/drivers/clk/mediatek/clk-mt8516-aud.c
index 90f48068a8de7007367d033d41ca1ee1ff6b2bbc..a3dafc719799c6afddb74501f51b3b4c56111551 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8516-aud.c
+++ b/drivers/clk/mediatek/clk-mt8516-aud.c
@@ -22,14 +22,8 @@ static const struct mtk_gate_regs aud_cg_regs = {
        .sta_ofs = 0x0,
 };
 
-#define GATE_AUD(_id, _name, _parent, _shift) {        \
-               .id = _id,                      \
-               .name = _name,                  \
-               .parent_name = _parent,         \
-               .regs = &aud_cg_regs,           \
-               .shift = _shift,                \
-               .ops = &mtk_clk_gate_ops_no_setclr,             \
-       }
+#define GATE_AUD(_id, _name, _parent, _shift)                  \
+       GATE_MTK(_id, _name, _parent, &aud_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
 
 static const struct mtk_gate aud_clks[] __initconst = {
        GATE_AUD(CLK_AUD_AFE, "aud_afe", "clk26m_ck", 2),

diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c
index b96db88893e23cc844473758d0d928085bf017b6..056953d594c662c7cbe9e2767c0a3a815cf5f141 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8516.c
+++ b/drivers/clk/mediatek/clk-mt8516.c
@@ -525,59 +525,23 @@ static const struct mtk_gate_regs top5_cg_regs = {
        .sta_ofs = 0x44,
 };
 
-#define GATE_TOP1(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top1_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_TOP1(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_TOP2(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top2_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_TOP2(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_TOP2_I(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top2_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_TOP2_I(_id, _name, _parent, _shift)                       \
+       GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
-#define GATE_TOP3(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top3_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr,        \
-       }
+#define GATE_TOP3(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
-#define GATE_TOP4_I(_id, _name, _parent, _shift) {     \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top4_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_setclr_inv,    \
-       }
+#define GATE_TOP4_I(_id, _name, _parent, _shift)                       \
+       GATE_MTK(_id, _name, _parent, &top4_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
 
-#define GATE_TOP5(_id, _name, _parent, _shift) {       \
-               .id = _id,                              \
-               .name = _name,                          \
-               .parent_name = _parent,                 \
-               .regs = &top5_cg_regs,                  \
-               .shift = _shift,                        \
-               .ops = &mtk_clk_gate_ops_no_setclr,     \
-       }
+#define GATE_TOP5(_id, _name, _parent, _shift)                         \
+       GATE_MTK(_id, _name, _parent, &top5_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
 
 static const struct mtk_gate top_clks[] __initconst = {
        /* TOP1 */