the same address by symbol types.
Summary: In XCOFF, each section comes with a default symbol
with the same name as the section. It doesn't bind
to code locations and it may cause incorrect display
of symbol names under `llvm-objdump -d`.
This patch changes the priority of symbols with the
same address by symbol type.
Reviewed By: jhenderson, shchenz
Differential Revision: https://reviews.llvm.org/D117642
Optional<XCOFF::StorageMappingClass> Smc, Optional<uint32_t> Idx,
bool Label)
: Addr(Addr), Name(Name), XCOFFSymInfo(Smc, Idx, Label), IsXCOFF(true) {}
- SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t Type)
- : Addr(Addr), Name(Name), Type(Type), IsXCOFF(false) {}
+ SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t Type,
+ bool IsXCOFF = false)
+ : Addr(Addr), Name(Name), Type(Type), IsXCOFF(IsXCOFF) {}
bool isXCOFF() const { return IsXCOFF; }
private:
assert(P1.IsXCOFF == P2.IsXCOFF &&
"P1.IsXCOFF should be equal to P2.IsXCOFF.");
if (P1.IsXCOFF)
- return std::tie(P1.Addr, P1.XCOFFSymInfo, P1.Name) <
- std::tie(P2.Addr, P2.XCOFFSymInfo, P2.Name);
+ return std::tie(P1.Addr, P1.XCOFFSymInfo, P1.Type, P1.Name) <
+ std::tie(P2.Addr, P2.XCOFFSymInfo, P2.Type, P2.Name);
return std::tie(P1.Addr, P1.Name, P1.Type) <
- std::tie(P2.Addr, P2.Name, P2.Type);
+ std::tie(P2.Addr, P2.Name, P2.Type);
}
};
public:
enum Type {
ST_Unknown, // Type not specified
+ ST_Other,
ST_Data,
ST_Debug,
ST_File,
ST_Function,
- ST_Other
};
SymbolRef() = default;
...
# DIS: Disassembly of section .text:
-# DIS: 00000000 <.text>:
+# DIS: 00000000 <.aix-prefixed-instruction-boundary>:
# DIS-NEXT: 0: 38 60 00 02 li 3, 2
# DIS-NEXT: 4: 06 00 00 00 38 63 00 0d paddi 3, 3, 13, 0
# DIS-NEXT: c: 06 00 00 00 38 63 00 0d paddi 3, 3, 13, 0
; CHECK: blr
}
-;CHECKOBJ: 00000000 <.text>:
+;CHECKOBJ: 00000000 <.foo>:
;CHECKOBJ-NEXT: 0: 38 60 00 37 li 3, 55
;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr{{[[:space:]] *}}
;CHECKOBJ-NEXT: 00000008 <.rodata.str1.1>:
; 32-REL-NOT: Type: R_RBR (0x1A)
; 32-DIS: Disassembly of section .text:
-; 32-DIS: 00000000 <.text>:
+; 32-DIS: 00000000 <.memcpy>:
; 32-DIS-NEXT: 0: 38 60 00 03 li 3, 3
; 32-DIS-NEXT: 4: 4e 80 00 20 blr
; 32-DIS-NEXT: 8: 60 00 00 00 nop
;CHECK-NEXT: .space 1
-;CHECKOBJ: 00000000 <.text>:
+;CHECKOBJ: 00000000 <.main>:
;CHECKOBJ-NEXT: 0: 38 60 00 00 li 3, 0
;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr
;CHECKOBJ-NEXT: ...{{[[:space:]] *}}
# DIS: Disassembly of section .text:
# DIS-EMPTY:
-# DIS-NEXT: 00000000 <.text>:
+# DIS-NEXT: 00000000 <.foo>:
# DIS-NEXT: 0: 80 62 00 00 lwz 3, 0(2)
# DIS-NEXT: 4: 4e 80 00 20 blr
# DIS-EMPTY:
; DIS: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000
; DIS: Disassembly of section .text:
-; DIS: 00000000 <.text>:
+; DIS: 00000000 <.foo>:
; DIS-NEXT: 0: 7c 08 02 a6 mflr 0
; DIS-NEXT: 4: 90 01 00 08 stw 0, 8(1)
; DIS-NEXT: 8: 94 21 ff c0 stwu 1, -64(1)
}
; CHECK: Disassembly of section .text:{{[[:space:]] *}}
-; CHECK-NEXT: 00000000 <.text>:
+; CHECK-NEXT: 00000000 <.foo>:
; CHECK-NEXT: 0: 38 60 00 00 li 3, 0
; CHECK-NEXT: 4: 4e 80 00 20 blr
; CHECK-NEXT: 8: 60 00 00 00 nop
CHECK: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000
CHECK: Disassembly of section .text:
-CHECK: 00000000 <.text>:
+CHECK: 00000000 <.func>:
CHECK-NEXT: 0: 80 62 00 04 lwz 3, 4(2)
WITH-R-NEXT: 00000002: R_TOC a
CHECK-NEXT: 4: 80 63 00 00 lwz 3, 0(3)
COMMON: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000
COMMON: Disassembly of section .text:
-PLAIN: 00000000 <.text>:
+PLAIN: 00000000 <.func>:
DESC: 00000000 (idx: 16) .func:
COMMON-NEXT: 0: 80 62 00 04 lwz 3, 4(2)
RELOC: 00000002: R_TOC (idx: 26) a[TC]
--- /dev/null
+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff %s -filetype=obj -o %t
+; RUN: llvm-objdump %t -d --no-show-raw-insn | FileCheck %s
+
+; CHECK: Disassembly of section .text:
+; CHECK: 00000000 <.foo3>:
+; CHECK: 00000020 <.foo4>:
+; CHECK: 00000040 <.foo>:
+; CHECK: 00000060 <.foo2>:
+
+define dso_local signext i32 @foo(i32 noundef signext %a) #0 section "explicit_sec" {
+entry:
+ ret i32 %a
+}
+
+define dso_local signext i32 @foo2(i32 noundef signext %a) #0 section "explicit_sec" {
+entry:
+ ret i32 %a
+}
+
+define dso_local signext i32 @foo3(i32 noundef signext %a) #0 {
+entry:
+ ret i32 %a
+}
+
+define dso_local signext i32 @foo4(i32 noundef signext %a) #0 {
+entry:
+ ret i32 %a
+}
; RUN: | FileCheck %s
;; Expect to find the branch labels.
-; CHECK-LABEL: <.text>:
-;; TODO: <.internal> should be printed instead of <.text>.
+; CHECK-LABEL: <.internal>:
; CHECK-NEXT: 0: mr 4, 3
; CHECK-NEXT: 4: li 3, 0
; CHECK-NEXT: 8: mtctr 4
; CHECK-NEXT: 60: bf 8, 0x84 <L1>
; CHECK-NEXT: <L0>:
; CHECK-NEXT: 64: mr 3, 31
-; CHECK-NEXT: 68: bl 0x0 <.text>
+; CHECK-NEXT: 68: bl 0x0 <.internal>
; CHECK-NEXT: 6c: mr 31, 3
; CHECK-NEXT: 70: cmplwi 3, 11
; CHECK-NEXT: 74: bt 0, 0x60 <L2>
-; CHECK-NEXT: 78: bl 0x0 <.text>
+; CHECK-NEXT: 78: bl 0x0 <.internal>
; CHECK-NEXT: 7c: nop
; CHECK-NEXT: 80: b 0x60 <L2>
; CHECK-NEXT: <L1>:
# LINES32: Inputs/basic32.o: file format aixcoff-rs6000
# LINES32: Disassembly of section .text:
-# LINES32: 00000000 <.text>:
+# LINES32: 00000000 <.main>:
# LINES32: ; .main():
# LINES32-NEXT: ; /basic.c:1
# LINES32-NEXT: 0: 38 60 00 00 li 3, 0
getXCOFFSymbolCsectSMC(XCOFFObj, Symbol);
return SymbolInfoTy(Addr, Name, Smc, SymbolIndex,
isLabel(XCOFFObj, Symbol));
+ } else if (Obj->isXCOFF()) {
+ const SymbolRef::Type SymType = unwrapOrError(Symbol.getType(), FileName);
+ return SymbolInfoTy(Addr, Name, SymType, true);
} else
return SymbolInfoTy(Addr, Name,
Obj->isELF() ? getElfSymbolType(Obj, Symbol)