RISC-V: split early & late of_node to hartid mapping
authorConor Dooley <conor.dooley@microchip.com>
Wed, 7 Jun 2023 20:28:26 +0000 (21:28 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 21 Jun 2023 14:45:14 +0000 (07:45 -0700)
Some back and forth with Drew [1] about riscv_fill_hwcap() resulted in
the realisation that it is not very useful to parse the DT & perform
validation of riscv,isa every time we would like to get the id for a
hart.

Although it is no longer called in riscv_fill_hwcap(),
riscv_of_processor_hartid() is called in several other places.
Notably in setup_smp() it forms part of the logic for filling the mask
of possible CPUs. Since a possible CPU must have passed this basic
validation of riscv,isa, a repeat validation is not required.

Rename riscv_of_processor_id() to riscv_early_of_processor_id(),
which will be called from setup_smp() & introduce a new
riscv_of_processor_id() which makes use of the pre-populated mask of
possible cpus.

Link: https://lore.kernel.org/linux-riscv/xvdswl3iyikwvamny7ikrxo2ncuixshtg3f6uucjahpe3xpc5c@ud4cz4fkg5dj/
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Link: https://lore.kernel.org/r/20230607-glade-pastel-d8cbd9d9f3c6@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/processor.h
arch/riscv/kernel/cpu.c
arch/riscv/kernel/smpboot.c

index 94a0590..3479f9f 100644 (file)
@@ -75,6 +75,7 @@ static inline void wait_for_interrupt(void)
 
 struct device_node;
 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid);
+int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hartid);
 int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid);
 
 extern void riscv_fill_hwcap(void);
index 637263f..8025de0 100644 (file)
  */
 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
 {
+       int cpu;
+
+       *hart = (unsigned long)of_get_cpu_hwid(node, 0);
+       if (*hart == ~0UL) {
+               pr_warn("Found CPU without hart ID\n");
+               return -ENODEV;
+       }
+
+       cpu = riscv_hartid_to_cpuid(*hart);
+       if (cpu < 0)
+               return cpu;
+
+       if (!cpu_possible(cpu))
+               return -ENODEV;
+
+       return 0;
+}
+
+int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hart)
+{
        const char *isa;
 
        if (!of_device_is_compatible(node, "riscv")) {
@@ -30,7 +50,7 @@ int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
                return -ENODEV;
        }
 
-       *hart = (unsigned long) of_get_cpu_hwid(node, 0);
+       *hart = (unsigned long)of_get_cpu_hwid(node, 0);
        if (*hart == ~0UL) {
                pr_warn("Found CPU without hart ID\n");
                return -ENODEV;
index 67bc5ef..3f42331 100644 (file)
@@ -148,7 +148,7 @@ static void __init of_parse_and_init_cpus(void)
        cpu_set_ops(0);
 
        for_each_of_cpu_node(dn) {
-               rc = riscv_of_processor_hartid(dn, &hart);
+               rc = riscv_early_of_processor_hartid(dn, &hart);
                if (rc < 0)
                        continue;