enum exynos_drm_trigger_type trg_type;
unsigned int nr_window;
unsigned int first_win;
+ unsigned int primary_win;
unsigned int lcdblk_offset;
unsigned int lcdblk_te_unmask_shift;
};
}
for (zpos = drv_data->first_win; zpos < WINDOWS_NR; zpos++) {
- type = (zpos == drv_data->first_win) ? DRM_PLANE_TYPE_PRIMARY :
- DRM_PLANE_TYPE_OVERLAY;
+ type = (zpos == drv_data->primary_win) ?
+ DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
1 << ctx->pipe, type, decon_formats,
ARRAY_SIZE(decon_formats), zpos);
return ret;
}
- exynos_plane = &ctx->planes[drv_data->first_win];
+ exynos_plane = &ctx->planes[drv_data->primary_win];
ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
ctx->pipe, ctx->drv_data->type, &decon_crtc_ops, ctx);
if (IS_ERR(ctx->crtc)) {
.type = EXYNOS_DISPLAY_TYPE_LCD,
.trg_type = EXYNOS_DISPLAY_HW_TRIGGER,
.first_win = 0,
+ .primary_win = 1,
.lcdblk_offset = 0x1004,
.lcdblk_te_unmask_shift = 13,
};
.type = EXYNOS_DISPLAY_TYPE_HDMI,
.trg_type = EXYNOS_DISPLAY_HW_TRIGGER,
.first_win = 1,
+ .primary_win = 1,
.lcdblk_offset = 0x1004,
.lcdblk_te_unmask_shift = 13,
};