hdmirx: fix HDCP CTS issues
authorLei Yang <lei.yang@amlogic.com>
Tue, 12 Jun 2018 10:20:30 +0000 (18:20 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Wed, 20 Jun 2018 02:50:26 +0000 (19:50 -0700)
PD#168221: hdmirx: fix HDCP CTS issues

1. disable hdcp 1.1 feature && fastreauth function.
2. ignore dvi recovery logic when aksv was received.

Change-Id: I48c37d4b7e0da7309c743052e16b0d607daa4110
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c

index 0fe5243..0de2fe1 100644 (file)
@@ -1146,10 +1146,10 @@ int rx_pr(const char *fmt, ...)
                strncpy(buf + 5, fmt + pos, (sizeof(buf) - 5));
        } else
                strcpy(buf, fmt);
-       /* if (fmt[strlen(fmt) - 1] == '\n') */
-               /* last_break = 1; */
-       /* else */
-               /* last_break = 0; */
+       if (fmt[strlen(fmt) - 1] == '\n')
+               last_break = 1;
+       else
+               last_break = 0;
        if (log_level & LOG_EN) {
                va_start(args, fmt);
                vprintk(buf, args);
index 0cfb5c9..948a66a 100644 (file)
  *
  */
 #define RX_VER1 "ver.2018/06/07"
-
-
-
+/*
+ *
+ *
+ */
+#define RX_VER2 "ver.2018/06/14"
 
 
 /* 50ms timer for hdmirx main loop (HDMI_STATE_CHECK_FREQ is 20) */
index b58f3bd..d22d6e6 100644 (file)
@@ -47,7 +47,7 @@
 #define SCRAMBLE_SEL 1
 #define HYST_HDMI_TO_DVI 5
 /* must = 0, other agilent source fail */
-#define HYST_DVI_TO_HDMI 0
+#define HYST_DVI_TO_HDMI 1
 #define GCP_GLOBAVMUTE_EN 1 /* ag506 must clear this bit */
 #define EDID_CLK_DIV 9 /* sys clk/(9+1) = 20M */
 #define HDCP_KEY_WR_TRIES              (5)
@@ -1081,7 +1081,19 @@ void rx_hdcp14_config(const struct hdmi_rx_hdcp *hdcp)
        unsigned int i = 0;
        unsigned int k = 0;
 
-       hdmirx_wr_bits_dwc(DWC_HDCP_SETTINGS, HDCP_FAST_MODE, 0);
+       unsigned int data32 = 0;
+       /* I2C_SPIKE_SUPPR */
+       data32 |= 1 << 16;
+       /* FAST_I2C */
+       data32 |= 0 << 12;
+       /* ONE_DOT_ONE */
+       data32 |= 0 << 9;
+       /* FAST_REAUTH */
+       data32 |= 0 << 8;
+       /* DDC_ADDR */
+       data32 |= 0x3a << 1;
+       hdmirx_wr_dwc(DWC_HDCP_SETTINGS, data32);
+       /* hdmirx_wr_bits_dwc(DWC_HDCP_SETTINGS, HDCP_FAST_MODE, 0); */
        /* Enable hdcp bcaps bit(bit7). In hdcp1.4 spec: Use of
         * this bit is reserved, hdcp Receivers not capable of
         * supporting HDMI must clear this bit to 0. For YAMAHA
index 4375325..8633360 100644 (file)
@@ -1812,8 +1812,8 @@ void hdmirx_open_port(enum tvin_port_e port)
 
 void hdmirx_close_port(void)
 {
-       if (sm_pause)
-               return;
+       /* if (sm_pause) */
+       /*      return; */
        /* External_Mute(1); */
 }
 
@@ -1967,14 +1967,13 @@ void rx_main_state_machine(void)
        case FSM_HPD_HIGH:
                hpd_wait_cnt++;
                if (rx_get_cur_hpd_sts() == 0) {
-                       if ((edid_update_flag) || (rx.boot_flag)) {
+                       if (edid_update_flag) {
                                if (hpd_wait_cnt <= hpd_wait_max*10)
                                        break;
                        } else {
                                if (hpd_wait_cnt <= hpd_wait_max)
                                        break;
                        }
-                       rx.boot_flag = false;
                }
                hpd_wait_cnt = 0;
                clk_unstable_cnt = 0;
@@ -1987,7 +1986,10 @@ void rx_main_state_machine(void)
                break;
        case FSM_WAIT_CLK_STABLE:
                if (is_clk_stable()) {
-                       clk_unstable_cnt = 0;
+                       if (clk_unstable_cnt != 0) {
+                               rx_pr("wait clk cnt %d\n", clk_unstable_cnt);
+                               clk_unstable_cnt = 0;
+                       }
                        if (++clk_stable_cnt > clk_stable_max) {
                                rx.state = FSM_EQ_START;
                                clk_stable_cnt = 0;
@@ -2094,7 +2096,9 @@ void rx_main_state_machine(void)
                                 * hpd reset once to recovery, to avoid
                                 * recognition to DVI of low probability
                                 */
-                               if (rx.pre.sw_dvi && dvi_check_en) {
+                               if (rx.pre.sw_dvi && dvi_check_en &&
+                                       (rx.hdcp.hdcp_version ==
+                                               HDCP_VER_NONE)) {
                                        rx.state = FSM_HPD_LOW;
                                        dvi_check_en = false;
                                        break;
@@ -2273,14 +2277,13 @@ void rx_main_state_machine(void)
                }
                hpd_wait_cnt++;
                if (rx_get_cur_hpd_sts() == 0) {
-                       if ((edid_update_flag) || (rx.boot_flag)) {
+                       if (edid_update_flag) {
                                if (hpd_wait_cnt <= hpd_wait_max*10)
                                        break;
                        } else {
                                if (hpd_wait_cnt <= hpd_wait_max)
                                        break;
                        }
-                       rx.boot_flag = false;
                }
                hpd_wait_cnt = 0;
                pre_port = rx.port;
@@ -2407,7 +2410,9 @@ void rx_main_state_machine(void)
                                }
                                sig_stable_cnt = 0;
                                sig_unstable_cnt = 0;
-                               if (rx.pre.sw_dvi && dvi_check_en) {
+                               if (rx.pre.sw_dvi && dvi_check_en &&
+                                       (rx.hdcp.hdcp_version ==
+                                               HDCP_VER_NONE)) {
                                        rx.state = FSM_HPD_LOW;
                                        dvi_check_en = false;
                                        break;
@@ -2910,6 +2915,7 @@ int hdmirx_debug(const char *buf, int size)
                rx_pr("------------------\n");
                rx_pr("Hdmirx version0: %s\n", RX_VER0);
                rx_pr("Hdmirx version1: %s\n", RX_VER1);
+               rx_pr("Hdmirx version2: %s\n", RX_VER2);
                rx_pr("------------------\n");
        }
        return 0;