mtd: nand: mxs: fix cache alignment for cache lines >32
authorStefan Agner <stefan.agner@toradex.com>
Tue, 2 Aug 2016 06:55:18 +0000 (23:55 -0700)
committerStefano Babic <sbabic@denx.de>
Tue, 6 Sep 2016 16:22:48 +0000 (18:22 +0200)
Currently the command buffer gets allocated with a size of 32 bytes.
This causes warning messages on systems with cache lines bigger than
32 bytes:
CACHE: Misaligned operation at range [9df17a009df17a20]

Define command buffer to be at least 32 bytes, but more if cache
line is bigger.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
drivers/mtd/nand/mxs_nand.c

index 94fc5c1..4bf564e 100644 (file)
 #endif
 #define        MXS_NAND_METADATA_SIZE                  10
 #define        MXS_NAND_BITS_PER_ECC_LEVEL             13
+
+#if !defined(CONFIG_SYS_CACHELINE_SIZE) || CONFIG_SYS_CACHELINE_SIZE < 32
 #define        MXS_NAND_COMMAND_BUFFER_SIZE            32
+#else
+#define        MXS_NAND_COMMAND_BUFFER_SIZE            CONFIG_SYS_CACHELINE_SIZE
+#endif
 
 #define        MXS_NAND_BCH_TIMEOUT                    10000