i965: Enable fast clears for multi-lod

On SKL (also fast clear is used for level 0, layer 0):

Manhattan 3.0:          3.88434% +/- 0.814659%
Manhattan 3.0 off:      3.25542% +/- 0.101149%
Trex:                   3.43501% +/- 0.31223%
Trex off:               4.13781% +/- 0.0993569%

ON BDW:

Manhattan 3.0:          1.37079% +/- 0.571208%
Manhattan 3.0 off:      1.74029% +/- 0.267499%

v2 (Ben, Matt): Fix rebase error by removing the perf warning
v3 (Topi): Rebased on top of revised eligibility logic

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 2c4cc08..a9b350e 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -201,21 +201,6 @@ intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
    if (brw->gen < 8 && (mip_mapped || arrayed))
       return false;
 
-   /* Not implemented yet. */
-   if (mip_mapped) {
-      perf_debug("Multi-LOD fast clear - giving up (%dx%dx%d).\n",
-                 mt->logical_width0, mt->logical_height0, mt->last_level);
-      return false;
-   }
-
-   /* Not implemented yet. */
-   if (arrayed) {
-      perf_debug("Layered fast clear - giving up. (%dx%d%d)\n",
-                 mt->logical_width0, mt->logical_height0,
-                 mt->physical_depth0);
-      return false;
-   }
-
    /* There's no point in using an MCS buffer if the surface isn't in a
     * renderable format.
     */