[PORT FROM R2] mid_pmu: check lss_08 audio driver to be in d0i0 for lpmp3 trigger

BZ: 17345

Current code implicitly assumes that LSS_08 is in D0i0 since S0ix command was
not possible, but it could so happen that LSS_08 or LSS_09 could be in D0i0 and
we could potentially enter LPMP3 mode.

This is incorrect, we need to make sure we enter LPMP3 IFF LSS_08 is in D0i0.

Fixed this by checking for D0i0 in target lpmp3 check.

Regarding LSS 09 this is audio DMA driver this is okay to be in D0i3, for LPMP3
to happen.

Change-Id: Ia5d3b2ff6ccf10f97021afd07f525834f5546495
Orig-Change-Id: I095569fe0c75021a824e94c0ed0b67b38f4b58ef
Signed-off-by: Illyas Mansoor <illyas.mansoor@intel.com>
Reviewed-on: http://android.intel.com:8080/29310
Reviewed-by: Martin, LoicX <loicx.martin@intel.com>
Tested-by: Martin, LoicX <loicx.martin@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/arch/x86/platform/mfld/pmu.h b/arch/x86/platform/mfld/pmu.h
index 9cf626e..c8495b7 100644 (file)
--- a/arch/x86/platform/mfld/pmu.h
+++ b/arch/x86/platform/mfld/pmu.h
@@ -313,6 +313,7 @@
        SSMSK(D0I3_MASK, PMU_SECURITY_LSS_04) | \
        SSMSK(D0I3_MASK, PMU_EMMC1_LSS_05) | \
        SSMSK(D0I3_MASK, PMU_USB_OTG_LSS_06) | \
+       SSMSK(D0I3_MASK, PMU_AUDIO_ENGINE_LSS_08) | \
        SSMSK(D0I3_MASK, PMU_SDIO2_LSS_14))
 
 #define LPMP3_TARGET_SSS1_MASK ( \
@@ -340,6 +341,7 @@
        SSMSK(D0I2_MASK, PMU_SECURITY_LSS_04) | \
        SSMSK(D0I3_MASK, PMU_EMMC1_LSS_05) | \
        SSMSK(D0I1_MASK, PMU_USB_OTG_LSS_06) | \
+       SSMSK(D0I0_MASK, PMU_AUDIO_ENGINE_LSS_08) | \
        SSMSK(D0I3_MASK, PMU_SDIO2_LSS_14))
 
 #define LPMP3_TARGET_SSS1 ( \