Revert "AArch64: Set shift bit of TLSLE HI12 add instruction"
authorDiana Picus <diana.picus@linaro.org>
Wed, 21 Sep 2016 08:24:41 +0000 (08:24 +0000)
committerDiana Picus <diana.picus@linaro.org>
Wed, 21 Sep 2016 08:24:41 +0000 (08:24 +0000)
This reverts commit r282057 because it broke the buildbots - see e.g.
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/12063

llvm-svn: 282058

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
llvm/test/MC/AArch64/tls-add-shift.s [deleted file]

index f5564ba..5a001c4 100644 (file)
@@ -263,12 +263,6 @@ AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
 
   ++MCNumFixups;
 
-  // Set the shift bit of the add instruction for relocation types
-  // R_AARCH64_TLSLE_ADD_TPREL_HI12 and R_AARCH64_TLSLD_ADD_DTPREL_HI12.
-  AArch64MCExpr::VariantKind RefKind = cast<AArch64MCExpr>(Expr)->getKind();
-  if (RefKind == AArch64MCExpr::VK_TPREL_HI12 ||
-      RefKind == AArch64MCExpr::VK_DTPREL_HI12)
-    ShiftVal = 12;
   return ShiftVal == 0 ? 0 : (1 << ShiftVal);
 }
 
diff --git a/llvm/test/MC/AArch64/tls-add-shift.s b/llvm/test/MC/AArch64/tls-add-shift.s
deleted file mode 100644 (file)
index 6e9cafe..0000000
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj < %s -o - | \
-// RUN:   llvm-objdump -r -d - | FileCheck %s
-
-       // TLS add TPREL
-       add x2, x1, #:tprel_hi12:var
-// CHECK: add x2, x1, #0, lsl #12
-// CHECK-NEXT: R_AARCH64_TLSLE_ADD_TPREL_HI12 var
-
-       // TLS add DTPREL
-       add x4, x3, #:dtprel_hi12:var
-// CHECK: add x4, x3, #0, lsl #12
-// CHECK-NEXT: R_AARCH64_TLSLD_ADD_DTPREL_HI12 var