}
/* Any defined maximum tmds clock limit we must not exceed? */
- if (connector->max_tmds_clock > 0) {
+ if (connector->display_info.max_tmds_clock > 0) {
/* mode_clock is clock in kHz for mode to be modeset on this connector */
mode_clock = amdgpu_connector->pixelclock_for_modeset;
/* Maximum allowable input clock in kHz */
- max_tmds_clock = connector->max_tmds_clock;
+ max_tmds_clock = connector->display_info.max_tmds_clock;
DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
connector->name, mode_clock, max_tmds_clock);
static void
parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
{
+ struct drm_display_info *info = &connector->display_info;
u8 len = cea_db_payload_len(db);
if (len >= 6) {
connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
- connector->dvi_dual = db[6] & 1;
+ info->dvi_dual = db[6] & 1;
}
if (len >= 7)
- connector->max_tmds_clock = db[7] * 5000;
+ info->max_tmds_clock = db[7] * 5000;
if (len >= 8) {
connector->latency_present[0] = db[8] >> 7;
connector->latency_present[1] = (db[8] >> 6) & 1;
"latency present %d %d, "
"video latency %d %d, "
"audio latency %d %d\n",
- connector->dvi_dual,
- connector->max_tmds_clock,
+ info->dvi_dual,
+ info->max_tmds_clock,
(int) connector->latency_present[0],
(int) connector->latency_present[1],
connector->video_latency[0],
*/
void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
{
+ struct drm_display_info *info = &connector->display_info;
uint8_t *eld = connector->eld;
u8 *cea;
u8 *db;
connector->video_latency[1] = 0;
connector->audio_latency[1] = 0;
- connector->max_tmds_clock = 0;
- connector->dvi_dual = false;
+ info->max_tmds_clock = 0;
+ info->dvi_dual = false;
cea = drm_find_cea_extension(edid);
if (!cea) {
}
/* Any defined maximum tmds clock limit we must not exceed? */
- if (connector->max_tmds_clock > 0) {
+ if (connector->display_info.max_tmds_clock > 0) {
/* mode_clock is clock in kHz for mode to be modeset on this connector */
mode_clock = radeon_connector->pixelclock_for_modeset;
/* Maximum allowable input clock in kHz */
- max_tmds_clock = connector->max_tmds_clock;
+ max_tmds_clock = connector->display_info.max_tmds_clock;
DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
connector->name, mode_clock, max_tmds_clock);
u32 bus_flags;
/**
+ * @max_tmds_clock: Maximum TMDS clock rate supported by the
+ * sink in kHz. 0 means undefined.
+ */
+ int max_tmds_clock;
+
+ /**
+ * @dvi_dual: Dual-link DVI sink?
+ */
+ bool dvi_dual;
+
+ /**
* @edid_hdmi_dc_modes: Mask of supported hdmi deep color modes. Even
* more stuff redundant with @bus_formats.
*/
* @encoder_ids: valid encoders for this connector
* @encoder: encoder driving this connector, if any
* @eld: EDID-like data, if present
- * @dvi_dual: dual link DVI, if found
- * @max_tmds_clock: max clock rate, if found
* @latency_present: AV delay info from ELD, if found
* @video_latency: video latency info from ELD, if found
* @audio_latency: audio latency info from ELD, if found
#define MAX_ELD_BYTES 128
/* EDID bits */
uint8_t eld[MAX_ELD_BYTES];
- bool dvi_dual;
- int max_tmds_clock; /* in kHz */
bool latency_present[2];
int video_latency[2]; /* [0]: progressive, [1]: interlaced */
int audio_latency[2];