xtensa: don't leave invalid TLB entry in fast_store_prohibited

When fast_store_prohibited needs to go to the C-level exception handler
it leaves TLB entry that caused page fault in the TLB. If the faulting
task gets switched to a different CPU and completes page table update
there the TLB entry will get out of sync with the page table which may
cause a livelock on access to that page.
Invalidate faulting TLB entry on a slow path exit from the
fast_store_prohibited.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index d703ed3..7852481 100644 (file)
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -1882,7 +1882,11 @@ ENTRY(fast_store_prohibited)
        j       8b
 
 2:     /* If there was a problem, handle fault in C */
-
+       rsr     a1, excvaddr
+       pdtlb   a0, a1
+       bbci.l  a0, DTLB_HIT_BIT, 1f
+       idtlb   a0
+1:
        rsr     a3, depc        # still holds a2
        s32i    a3, a2, PT_AREG2
        mov     a1, a2