radv: lower nir_intrinsic_load_fully_covered
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 22 Feb 2023 15:32:26 +0000 (16:32 +0100)
committerMarge Bot <emma+marge@anholt.net>
Tue, 21 Mar 2023 08:44:09 +0000 (08:44 +0000)
The sample coverage VGPR input would be the inner coverage and 0 means
it's uncovered.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21497>

src/amd/vulkan/radv_nir_lower_abi.c

index c61f920..2ed0497 100644 (file)
@@ -447,6 +447,11 @@ lower_abi_instr(nir_builder *b, nir_instr *instr, void *state)
    case nir_intrinsic_load_force_vrs_rates_amd:
       replacement = ac_nir_load_arg(b, &s->args->ac, s->args->ac.force_vrs_rates);
       break;
+   case nir_intrinsic_load_fully_covered: {
+      nir_ssa_def *sample_coverage = ac_nir_load_arg(b, &s->args->ac, s->args->ac.sample_coverage);
+      replacement = nir_ine_imm(b, sample_coverage, 0);
+      break;
+   }
    default:
       progress = false;
       break;