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drm/i915: Don't program DSPCLK_GATE_D twice on IVB and VLV
author
Damien Lespiau
<damien.lespiau@intel.com>
Fri, 19 Oct 2012 16:55:43 +0000
(17:55 +0100)
committer
Daniel Vetter
<daniel.vetter@ffwll.ch>
Fri, 19 Oct 2012 23:01:48 +0000
(
01:01
+0200)
We were programming register 0x42020 twice on those platforms. Once
should be enough.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c
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diff --git
a/drivers/gpu/drm/i915/intel_pm.c
b/drivers/gpu/drm/i915/intel_pm.c
index
a0804eb
..
30ae8f5
100644
(file)
--- a/
drivers/gpu/drm/i915/intel_pm.c
+++ b/
drivers/gpu/drm/i915/intel_pm.c
@@
-3498,11
+3498,8
@@
static void ivybridge_init_clock_gating(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
int pipe;
- uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
uint32_t snpcr;
- I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
-
I915_WRITE(WM3_LP_ILK, 0);
I915_WRITE(WM2_LP_ILK, 0);
I915_WRITE(WM1_LP_ILK, 0);
@@
-3580,9
+3577,6
@@
static void valleyview_init_clock_gating(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
int pipe;
- uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
-
- I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
I915_WRITE(WM3_LP_ILK, 0);
I915_WRITE(WM2_LP_ILK, 0);