The existing code for this appears to work okay for conversions
involving 64-bit floats, relax the assert and enable the lowering
path. This fixes 64-bit float to 64-bit integer integer conversions
on devices that have native support for 64-bit floats but lack 64-bit
integer support, like Intel MTL hardware.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19128>
static nir_ssa_def *
lower_f2(nir_builder *b, nir_ssa_def *x, bool dst_is_signed)
{
- assert(x->bit_size == 16 || x->bit_size == 32);
+ assert(x->bit_size == 16 || x->bit_size == 32 || x->bit_size == 64);
nir_ssa_def *x_sign = NULL;
if (dst_is_signed)
return lower_2f(b, src[0], nir_dest_bit_size(alu->dest.dest), false);
case nir_op_f2i64:
case nir_op_f2u64:
- /* We don't support f64toi64 (yet?). */
- if (src[0]->bit_size > 32)
- return false;
-
return lower_f2(b, src[0], alu->op == nir_op_f2i64);
default:
unreachable("Invalid ALU opcode to lower");