intel: Make renderbuffer tiling choice match texture tiling choice.
authorEric Anholt <eric@anholt.net>
Sat, 8 Jan 2011 02:18:50 +0000 (18:18 -0800)
committerEric Anholt <eric@anholt.net>
Sat, 8 Jan 2011 02:25:54 +0000 (18:25 -0800)
There really shouldn't be any difference between the two for us.
Fixes a bug where Z16 renderbuffers would be untiled on gen6, likely
leading to hangs.

src/mesa/drivers/dri/intel/intel_fbo.c

index f317cdc..efc726e 100644 (file)
@@ -145,10 +145,15 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
    DBG("Allocating %d x %d Intel RBO\n", width, height);
 
    tiling = I915_TILING_NONE;
-
-   /* Gen6 requires depth must be tiling */
-   if (intel->gen >= 6 && rb->Format == MESA_FORMAT_S8_Z24)
-       tiling = I915_TILING_Y;
+   if (intel->use_texture_tiling) {
+      GLenum base_format = _mesa_get_format_base_format(rb->Format);
+
+      if (intel->gen >= 4 && (base_format == GL_DEPTH_COMPONENT ||
+                             base_format == GL_DEPTH_STENCIL))
+        tiling = I915_TILING_Y;
+      else
+        tiling = I915_TILING_X;
+   }
 
    irb->region = intel_region_alloc(intel->intelScreen, tiling, cpp,
                                    width, height, GL_TRUE);